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| author | Stephen Glancy <sglancy@us.ibm.com> | 2018-04-02 15:29:43 -0500 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2018-04-20 10:47:56 -0400 |
| commit | 38b16d88416d1e0fe8d352da4f5d8739e8bcbb33 (patch) | |
| tree | 9a977f94616e3703e5c8f80d4263a70e754d6ca7 /src/import/chips/p9/procedures/xml | |
| parent | b6271f37908f731fd1721e4457d187b2124e9317 (diff) | |
| download | talos-hostboot-38b16d88416d1e0fe8d352da4f5d8739e8bcbb33.tar.gz talos-hostboot-38b16d88416d1e0fe8d352da4f5d8739e8bcbb33.zip | |
Adds centaur dynamic VDDR code
Change-Id: Ie6f0471da550f386b3558b274affad02d4f1b673
cmvc-coreq: 1052555
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56593
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Michael D. Pardeik <pardeik@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56667
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml')
| -rwxr-xr-x | src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml index 7496bbe17..48ecc68d8 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml @@ -335,63 +335,63 @@ </attribute> <attribute> - <id>ATTR_MSS_MRW_AVDD_OFFSET_DISABLE</id> + <id>ATTR_MSS_MRW_AVDD_OFFSET_ENABLE</id> <targetType>TARGET_TYPE_SYSTEM</targetType> <description>Used for to determine whether to apply an offset to AVDD. Supplied by MRW.</description> <valueType>uint8</valueType> - <enum>DISABLE = 1, ENABLE = 0</enum> + <enum>ENABLE = 1, DISABLE = 0</enum> <platInit/> <initToZero/> <!-- little comment to tell us this might change during power/thermal implemetation --> - <mssAccessorName>mrw_avdd_offset_disable</mssAccessorName> + <mssAccessorName>mrw_avdd_offset_enable</mssAccessorName> </attribute> <attribute> - <id>ATTR_MSS_MRW_VDD_OFFSET_DISABLE</id> + <id>ATTR_MSS_MRW_VDD_OFFSET_ENABLE</id> <targetType>TARGET_TYPE_SYSTEM</targetType> <description>Used for to determine whether to apply an offset to VDD. Supplied by MRW.</description> <valueType>uint8</valueType> - <enum>DISABLE = 1, ENABLE = 0</enum> + <enum>ENABLE = 1, DISABLE = 0</enum> <platInit/> <initToZero/> <!-- little comment to tell us this might change during power/thermal implemetation --> - <mssAccessorName>mrw_vdd_offset_disable</mssAccessorName> + <mssAccessorName>mrw_vdd_offset_enable</mssAccessorName> </attribute> <attribute> - <id>ATTR_MSS_MRW_VCS_OFFSET_DISABLE</id> + <id>ATTR_MSS_MRW_VCS_OFFSET_ENABLE</id> <targetType>TARGET_TYPE_SYSTEM</targetType> <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description> <valueType>uint8</valueType> - <enum>DISABLE = 1, ENABLE = 0</enum> + <enum>ENABLE = 1, DISABLE = 0</enum> <platInit/> <initToZero/> <!-- little comment to tell us this might change during power/thermal implemetation --> - <mssAccessorName>mrw_vcs_offset_disable</mssAccessorName> + <mssAccessorName>mrw_vcs_offset_enable</mssAccessorName> </attribute> <attribute> - <id>ATTR_MSS_MRW_VPP_OFFSET_DISABLE</id> + <id>ATTR_MSS_MRW_VPP_OFFSET_ENABLE</id> <targetType>TARGET_TYPE_SYSTEM</targetType> <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description> <valueType>uint8</valueType> - <enum>DISABLE = 1, ENABLE = 0</enum> + <enum>ENABLE = 1, DISABLE = 0</enum> <platInit/> <initToZero/> <!-- little comment to tell us this might change during power/thermal implemetation --> - <mssAccessorName>mrw_vpp_offset_disable</mssAccessorName> + <mssAccessorName>mrw_vpp_offset_enable</mssAccessorName> </attribute> <attribute> - <id>ATTR_MSS_MRW_VDDR_OFFSET_DISABLE</id> + <id>ATTR_MSS_MRW_VDDR_OFFSET_ENABLE</id> <targetType>TARGET_TYPE_SYSTEM</targetType> <description>Used for to determine whether to apply an offset to VDDR. Supplied by MRW.</description> <valueType>uint8</valueType> - <enum>DISABLE = 1, ENABLE = 0</enum> + <enum>ENABLE = 1, DISABLE = 0</enum> <platInit/> <initToZero/> <!-- little comment to tell us this might change during power/thermal implemetation --> - <mssAccessorName>mrw_vddr_offset_disable</mssAccessorName> + <mssAccessorName>mrw_vddr_offset_enable</mssAccessorName> </attribute> <attribute> |
