Update error handling for IPL procedures

Change-Id: I4644227da8b9d84af4987e7652d7ef3e98494c3f
RTC: 155734
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25568
Tested-by: Hostboot CI
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25573
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

3 files changed, 150 insertions, 14 deletions

diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_draminit_training.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_draminit_training.xml
index 03fa442d7..b0095c9e4 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_draminit_training.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_draminit_training.xml
@@ -76,7 +76,9 @@
 </registerFfdc>
 
 <registerFfdc>
-  <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+  <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
+  <scomRegister>MCA_DDRPHY_PC_INIT_CAL_ERROR_P0</scomRegister>
+  <scomRegister>MCA_DDRPHY_PC_ERROR_STATUS0_P0</scomRegister>
   <scomRegister>MCA_DDRPHY_DP16_RD_STATUS0_P0_0</scomRegister>
   <scomRegister>MCA_DDRPHY_DP16_RD_STATUS0_P0_1</scomRegister>
   <scomRegister>MCA_DDRPHY_DP16_RD_STATUS0_P0_2</scomRegister>
@@ -110,7 +112,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -133,7 +135,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -156,7 +158,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -179,7 +181,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -202,7 +204,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -225,7 +227,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -248,7 +250,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -271,7 +273,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -294,7 +296,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -317,7 +319,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -340,7 +342,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
@@ -363,7 +365,7 @@
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <collectRegisterFfdc>
-    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_DP16_ERROR_STATUS</id>
+    <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id>
     <target>TARGET_IN_ERROR</target>
   </collectRegisterFfdc>
   <callout>
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml
index 1ffe1702a..5b9193318 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml
@@ -33,11 +33,127 @@
 <hwpErrors>
 
   <registerFfdc>
+    <id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
+    <scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP0_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP1_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP2_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP3_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP0_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP1_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP2_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP3_P0</scomRegister>
+
+    <scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP0_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP1_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP2_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP3_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP0_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP1_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP2_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP3_P0</scomRegister>
+
+    <scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP0_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP1_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP2_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP3_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP0_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP1_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP2_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP3_P0</scomRegister>
+
+    <scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP0_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP1_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP2_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP3_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP0_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP1_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP2_P0</scomRegister>
+    <scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP3_P0</scomRegister>
+  </registerFfdc>
+
+  <registerFfdc>
     <id>REG_FFDC_MSS_CCS_FAILURE</id>
     <scomRegister>MCBIST_CCS_MODEQ</scomRegister>
     <scomRegister>MCBIST_CCS_STATQ</scomRegister>
     <scomRegister>MCBIST_CCS_CNTLQ</scomRegister>
     <scomRegister>MCBIST_MCBMCATQ</scomRegister>
+
+    <!-- Instructions -->
+    <scomRegister>MCBIST_CCS_INST_ARR0_00</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_01</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_02</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_03</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_04</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_05</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_06</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_07</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_08</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_09</scomRegister>
+
+    <scomRegister>MCBIST_CCS_INST_ARR0_10</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_11</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_12</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_13</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_14</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_15</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_16</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_17</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_18</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_19</scomRegister>
+
+    <scomRegister>MCBIST_CCS_INST_ARR0_20</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_21</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_22</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_23</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_24</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_25</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_26</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_27</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_28</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_29</scomRegister>
+
+    <scomRegister>MCBIST_CCS_INST_ARR0_30</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR0_31</scomRegister>
+
+    <!-- Control array -->
+    <scomRegister>MCBIST_CCS_INST_ARR1_00</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_01</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_02</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_03</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_04</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_05</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_06</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_07</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_08</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_09</scomRegister>
+
+    <scomRegister>MCBIST_CCS_INST_ARR1_10</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_11</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_12</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_13</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_14</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_15</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_16</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_17</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_18</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_19</scomRegister>
+
+    <scomRegister>MCBIST_CCS_INST_ARR1_20</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_21</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_22</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_23</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_24</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_25</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_26</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_27</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_28</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_29</scomRegister>
+
+    <scomRegister>MCBIST_CCS_INST_ARR1_30</scomRegister>
+    <scomRegister>MCBIST_CCS_INST_ARR1_31</scomRegister>
+
+    <!-- to get the CCS state machine hung state -->
+    <scomRegister>MCBIST_MCBERRPTQ</scomRegister>
   </registerFfdc>
 
   <hwpError>
@@ -48,6 +164,10 @@
       <id>REG_FFDC_MSS_CCS_FAILURE</id>
       <target>TARGET_IN_ERROR</target>
     </collectRegisterFfdc>
+    <collectRegisterFfdc>
+      <id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
+      <target>TARGET_IN_ERROR</target>
+    </collectRegisterFfdc>
     <callout>
       <target>TARGET_IN_ERROR</target>
       <priority>HIGH</priority>
@@ -65,6 +185,10 @@
       <id>REG_FFDC_MSS_CCS_FAILURE</id>
       <target>TARGET_IN_ERROR</target>
     </collectRegisterFfdc>
+    <collectRegisterFfdc>
+      <id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
+      <target>TARGET_IN_ERROR</target>
+    </collectRegisterFfdc>
     <callout>
       <target>TARGET_IN_ERROR</target>
       <priority>HIGH</priority>
@@ -82,6 +206,10 @@
       <id>REG_FFDC_MSS_CCS_FAILURE</id>
       <target>TARGET_IN_ERROR</target>
     </collectRegisterFfdc>
+    <collectRegisterFfdc>
+      <id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
+      <target>TARGET_IN_ERROR</target>
+    </collectRegisterFfdc>
     <callout>
       <target>TARGET_IN_ERROR</target>
       <priority>HIGH</priority>
@@ -98,6 +226,10 @@
       <id>REG_FFDC_MSS_CCS_FAILURE</id>
       <target>TARGET_IN_ERROR</target>
     </collectRegisterFfdc>
+    <collectRegisterFfdc>
+      <id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
+      <target>TARGET_IN_ERROR</target>
+    </collectRegisterFfdc>
     <callout>
       <target>TARGET_IN_ERROR</target>
       <priority>HIGH</priority>
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_memdiags.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_memdiags.xml
index cb31c4284..f80a8ae75 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_memdiags.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_memdiags.xml
@@ -58,7 +58,8 @@
   <hwpError>
     <rc>RC_MSS_MEMDIAGS_UE_OR_SUE_IN_LAST_PATTERN</rc>
     <description>A UE or SUE was caused by the last MCBIST pattern</description>
-    <ffdc>STATUS</ffdc>
+    <ffdc>STATUS0</ffdc>
+    <ffdc>STATUS1</ffdc>
     <collectRegisterFfdc>
       <id>REG_FFDC_MSS_MEMDIAGS_FAILURE</id>
       <target>TARGET</target>
@@ -73,6 +74,7 @@
     <rc>RC_MSS_MEMDIAGS_COMPARE_ERROR_IN_LAST_PATTERN</rc>
     <description>A miscompare error was caused by the last MCBIST pattern</description>
     <ffdc>PORT</ffdc>
+    <ffdc>SUBTEST</ffdc>
     <collectRegisterFfdc>
       <id>REG_FFDC_MSS_MEMDIAGS_FAILURE</id>
       <target>TARGET</target>