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author | Prasad Bg Ranganath <prasadbgr@in.ibm.com> | 2018-08-28 07:09:48 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-09-04 10:45:59 -0500 |
commit | ae850cf7588d14c4456991d5548cc4537bcd7964 (patch) | |
tree | a0611580dd6502b33e5cbf21fb18b7fba5c49173 /src/import/chips/p9/procedures/xml/error_info | |
parent | 84923368d03fcf5a7bd09f9a6aa1dc692d65db3e (diff) | |
download | talos-hostboot-ae850cf7588d14c4456991d5548cc4537bcd7964.tar.gz talos-hostboot-ae850cf7588d14c4456991d5548cc4537bcd7964.zip |
PM:Some more cleanups in update_ec_eq procedure for core unit xstop case
- Enabled EX check. even if it's EQ is functional
- one more check of clock power off which is
required for mpipl case.
- had one bug during l2/l3 stop clock which fixes status bit update.
Actually clock was stopped but the status bit was not set
in EQ_CLOCK_STAT register.
Key_Cronus_Test=PM_REGRESS
Change-Id: I7e8dbea00235ade5a692198dde7c2e6758809b9f
CQ:SW443537
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65360
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65365
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/error_info')
-rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_pm_init_errors.xml | 177 |
1 files changed, 177 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_pm_init_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_pm_init_errors.xml index de29dc553..1864b09da 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_pm_init_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_pm_init_errors.xml @@ -117,4 +117,181 @@ </callout> </hwpError> <!-- ******************************************************************** --> + <hwpError> + <rc>RC_CORE_CLOCK_STOP_FAILED</rc> + <description>Failed to switch off the core clock + </description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>CORE_POS</ffdc> + <callout> + <target>CORE_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_CORE_CLOCKSYNC_FAILED</rc> + <description>Failed to sync the core clocks + </description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>CORE_POS</ffdc> + <callout> + <target>CORE_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_CORE_CLOCK_POWEROFF_FAILED</rc> + <description>Failed to power off the core clock + </description> + <ffdc>CORE_TARGET</ffdc> + <ffdc>CORE_POS</ffdc> + <callout> + <target>CORE_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_EX_L2_PURGE_FAILED</rc> + <description>Failed to purge L2 + </description> + <ffdc>EX_TARGET</ffdc> + <ffdc>EX_POS</ffdc> + <callout> + <target>EX_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_EX_L2_CLOCKOFF_FAILED</rc> + <description>Failed to switch off L2 clock + </description> + <ffdc>EX_TARGET</ffdc> + <ffdc>EX_POS</ffdc> + <callout> + <target>EX_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_EX_L3_CLOCKOFF_FAILED</rc> + <description>Failed to switch off L3 clock + </description> + <ffdc>EX_TARGET</ffdc> + <ffdc>EX_POS</ffdc> + <callout> + <target>EX_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_EX_L3_PURGE_FAILED</rc> + <description>Failed to purge L3 + </description> + <ffdc>EX_TARGET</ffdc> + <ffdc>EX_POS</ffdc> + <callout> + <target>EX_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_EQ_VDD_POWEROFF_FAILED</rc> + <description>Failed to poweroff VDD of EQ + </description> + <ffdc>EQ_TARGET</ffdc> + <ffdc>EQ_POS</ffdc> + <callout> + <target>EQ_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_EQ_VCS_POWEROFF_FAILED</rc> + <description>Failed to poweroff VCS of EQ + </description> + <ffdc>EQ_TARGET</ffdc> + <ffdc>EQ_POS</ffdc> + <callout> + <target>EQ_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_EQ_CLOCKOFF_FAILED</rc> + <description>Failed to switch off the eq clock + </description> + <ffdc>EQ_TARGET</ffdc> + <ffdc>EQ_POS</ffdc> + <callout> + <target>EQ_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_EX_L2_CLOCKSYNC_FAILED</rc> + <description>Failed to sync L2 + </description> + <ffdc>EX_TARGET</ffdc> + <ffdc>EX_POS</ffdc> + <callout> + <target>EX_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + </hwpErrors> |