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| author | Thi Tran <thi@us.ibm.com> | 2016-08-10 14:20:50 -0500 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2016-08-15 11:13:16 -0400 |
| commit | 5d57720970f8c8ffcefee7bfa5f9ec24f141501d (patch) | |
| tree | 4590e75fca0129a6ef5bcca7538f718426d6998a /src/import/chips/p9/procedures/xml/error_info/p9_setup_bars_errors.xml | |
| parent | 2cc02a5c335de6e33b6b868d0d8a3b13a99f9a84 (diff) | |
| download | talos-hostboot-5d57720970f8c8ffcefee7bfa5f9ec24f141501d.tar.gz talos-hostboot-5d57720970f8c8ffcefee7bfa5f9ec24f141501d.zip | |
New files to be mirrored to HB for p9_setup_bars
Change-Id: I96b561cdb45a9b4712d6eef7068ea1483c64c7cc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28123
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28211
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/error_info/p9_setup_bars_errors.xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_setup_bars_errors.xml | 124 |
1 files changed, 124 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_setup_bars_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_setup_bars_errors.xml new file mode 100644 index 000000000..59d33864f --- /dev/null +++ b/src/import/chips/p9/procedures/xml/error_info/p9_setup_bars_errors.xml @@ -0,0 +1,124 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_setup_bars_errors.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2016 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- Halt codes for p9_setup_bars --> +<hwpErrors> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SETUP_BARS_FSP_BAR_ATTR_ERR</rc> + <description> + Procedure: p9_setup_bars + FSP BAR attributes are not aligned to HW implementation + </description> + <ffdc>TARGET</ffdc> + <ffdc>BAR_OFFSET</ffdc> + <ffdc>BAR_OFFSET_MASK</ffdc> + <ffdc>BAR_OVERLAP</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SETUP_BARS_PSI_BAR_ATTR_ERR</rc> + <description> + Procedure: p9_setup_bars + PSI BAR attributes are not aligned to HW implementation + </description> + <ffdc>TARGET</ffdc> + <ffdc>BAR_OFFSET</ffdc> + <ffdc>BAR_OFFSET_MASK</ffdc> + <ffdc>BAR_OVERLAP</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SETUP_BARS_NPU_PHY0_BAR_ATTR_ERR</rc> + <description> + Procedure: p9_setup_bars + NPU PHY0 BAR attributes are not aligned to HW implementation + </description> + <ffdc>TARGET</ffdc> + <ffdc>BAR_OFFSET</ffdc> + <ffdc>BAR_OFFSET_MASK</ffdc> + <ffdc>BAR_OVERLAP</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SETUP_BARS_NPU_PHY1_BAR_ATTR_ERR</rc> + <description> + Procedure: p9_setup_bars + NPU PHY1 BAR attributes are not aligned to HW implementation + </description> + <ffdc>TARGET</ffdc> + <ffdc>BAR_OFFSET</ffdc> + <ffdc>BAR_OFFSET_MASK</ffdc> + <ffdc>BAR_OVERLAP</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SETUP_BARS_NPU_MMIO_BAR_ATTR_ERR</rc> + <description> + Procedure: p9_setup_bars + NPU MMIO BAR attributes are not aligned to HW implementation + </description> + <ffdc>TARGET</ffdc> + <ffdc>BAR_OFFSET</ffdc> + <ffdc>BAR_OFFSET_MASK</ffdc> + <ffdc>BAR_OVERLAP</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SETUP_BARS_INVALID_MCD_NM_RANGE_ERR</rc> + <description> + Procedure: p9_setup_bars + Invalid configuration for MCD non-mirrored range + </description> + <ffdc>TARGET</ffdc> + <ffdc>NM_RANGE_IDX</ffdc> + <ffdc>NM_RANGE_BASE_ADDR</ffdc> + <ffdc>NM_RANGE_SIZE</ffdc> + <ffdc>NM_CHIP_BASE</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SETUP_BARS_INVALID_MCD_M_RANGE_ERR</rc> + <description> + Procedure: p9_setup_bars + Invalid configuration for MCD mirrored range + </description> + <ffdc>TARGET</ffdc> + <ffdc>M_RANGE_IDX</ffdc> + <ffdc>M_RANGE_BASE_ADDR</ffdc> + <ffdc>M_RANGE_SIZE</ffdc> + <ffdc>M_CHIP_BASE</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SETUP_BARS_INVALID_MCD_GROUP_SIZE_ERR</rc> + <description> + Procedure: p9_setup_bars + Unsupported MCD group size + </description> + <ffdc>TARGET</ffdc> + <ffdc>RANGE_SIZE</ffdc> + </hwpError> + <!-- ******************************************************************** --> +</hwpErrors> |
