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| author | Joe McGill <jmcgill@us.ibm.com> | 2016-05-27 08:51:42 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-08-20 09:59:39 -0400 |
| commit | c349e48ebbaa0ab48ff71112de87b4bcd2bcca71 (patch) | |
| tree | 36076f91f55117862e584709699e0fc888698eee /src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml | |
| parent | deec1342b44a07dd23706221e0fef308c27c9b2a (diff) | |
| download | talos-hostboot-c349e48ebbaa0ab48ff71112de87b4bcd2bcca71.tar.gz talos-hostboot-c349e48ebbaa0ab48ff71112de87b4bcd2bcca71.zip | |
L2 HWP -- p9_setup_bars
p9_setup_bars
initial relase -- program FSP/PSI/NPU BARs & configure MCD
nest_attributes
proc_setup_bars_attributes
adjust scope of BAR base address attributes from chip->system
change to reflect offset from base of chip address range, rather than
absolute address
p9_fbc_utils
modify p9_fbc_utils_get_chip_base_address() to output base of each on
chip region, consider policy affecting placement of mirrrored memory
p9_mss_eff_grouping
p9_sbe_load_bootloader
p9_sbe_mcs_setup
adapt to p9_fbc_utils_get_chip_base_address() changes
p9_sbe_scominit
adapt to p9_fbc_utils_get_chip_base_address() / attribute scope changes
add placeholder for FIR register initialization
p9_pcie_config
adapt to p9_fbc_utils_get_chip_base_address() / attribute scope changes
skip programming of INT resources
Change-Id: I2086b04229acec409da74dc4909e9912eb8e152d
Original-Change-Id: I62e1766fbe8366168cc3f1b9b43c64f48659aec0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27841
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Peng Fei Gou <shgoupf@cn.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44856
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml index 9fdbad6e6..248f14abb 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_scominit_errors.xml @@ -24,4 +24,29 @@ <!-- IBM_PROLOG_END_TAG --> <!-- Halt codes for p9_sbe_scominit --> <hwpErrors> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SBE_SCOMINIT_XSCOM_BAR_ATTR_ERR</rc> + <description> + Procedure: p9_sbe_scominit + Invalid XSCOM BAR attribute configuration + </description> + <ffdc>TARGET</ffdc> + <ffdc>XSCOM_BAR</ffdc> + <ffdc>XSCOM_BAR_OFFSET</ffdc> + <ffdc>BASE_ADDR_MMIO</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P9_SBE_SCOMINIT_LPC_BAR_ATTR_ERR</rc> + <description> + Procedure: p9_sbe_scominit + Invalid LPC BAR attribute configuration + </description> + <ffdc>TARGET</ffdc> + <ffdc>LPC_BAR</ffdc> + <ffdc>LPC_BAR_OFFSET</ffdc> + <ffdc>BASE_ADDR_MMIO</ffdc> + </hwpError> + <!-- ******************************************************************** --> </hwpErrors> |
