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| author | Thi Tran <thi@us.ibm.com> | 2016-03-03 14:01:58 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-05-16 14:40:47 -0400 |
| commit | 2a23869b2a730d632b9f2b8ff686ced2a1d03c82 (patch) | |
| tree | ae7a69f7501f1917131ec5d18c28c943be578707 /src/import/chips/p9/procedures/xml/error_info/p9_mss_setup_bars_errors.xml | |
| parent | 3f7e122b3e5a48a5d371788ec790a3b746f3d97d (diff) | |
| download | talos-hostboot-2a23869b2a730d632b9f2b8ff686ced2a1d03c82.tar.gz talos-hostboot-2a23869b2a730d632b9f2b8ff686ced2a1d03c82.zip | |
L2 HWPs - p9_mss_setup_bars
Change-Id: I54180802817bdc3b0222f12d178a54b58ded30c7
Original-Change-Id: I9d874a9d90ad1cf0fc9ee7c9366a3610b09b9073
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21671
Tested-by: Jenkins Server
Tested-by: Auto Mirror
Tested-by: Hostboot CI
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: JOSHUA L. HANNAN <jlhannan@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24598
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/error_info/p9_mss_setup_bars_errors.xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_mss_setup_bars_errors.xml | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_mss_setup_bars_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_mss_setup_bars_errors.xml new file mode 100644 index 000000000..a3261c259 --- /dev/null +++ b/src/import/chips/p9/procedures/xml/error_info/p9_mss_setup_bars_errors.xml @@ -0,0 +1,86 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: chips/p9/procedures/xml/error_info/p9_mss_setup_bars_errors.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- EKB Project --> +<!-- --> +<!-- COPYRIGHT 2016 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- File: p9_mss_setup_bars_errors.xml. --> +<!-- Error definitions for p9_mss_setup_bars HWP. --> + +<hwpErrors> + + <hwpError> + <rc>RC_MSS_SETUP_BARS_INVALID_MC_CHIPLETS_DETECTED</rc> + <description>Processor contains both MCS and MI chiplets.</description> + <ffdc>NUM_MCS</ffdc> + <ffdc>NUM_MI</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <hwpError> + <rc>RC_MSS_SETUP_BARS_MULTIPLE_GROUP_ERR</rc> + <description>An MC port is grouped multiples times.</description> + <ffdc>PORT_ID</ffdc> + <ffdc>COUNTER</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <hwpError> + <rc>RC_MSS_SETUP_BARS_MCS_MEMSIZE_DISCREPENCY</rc> + <description>The amount of memory behind an MCS calculated from Group Data + doesn't agree with the amount of memory currently reported behind + the same MCS.</description> + <ffdc>TARGET</ffdc> + <ffdc>MEMSIZE_GROUP_DATA</ffdc> + <ffdc>MEMSIZE_REPORTED</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <hwpError> + <rc>RC_MSS_SETUP_BARS_INVALID_PORTS_CONFIG</rc> + <description>Invalid number in group for ports 0/1 of the MCS. + The combination can not be found in the Channel Per Group + table.</description> + <ffdc>PORT_0_PORTS_IN_GROUP</ffdc> + <ffdc>PORT_0_GROUP</ffdc> + <ffdc>PORT_1_PORTS_IN_GROUP</ffdc> + <ffdc>PORT_1_GROUP</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + <hwpError> + <rc>RC_MSS_SETUP_BARS_INVALID_GROUP_SIZE</rc> + <description>Can't locate givem Group size in the GROUP_SIZE_TABLE in order + to determine MCFGP/MCFGPM Group size value (bits 13:23).</description> + <ffdc>GROUP_SIZE</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +</hwpErrors> |
