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| author | Brian Silver <bsilver@us.ibm.com> | 2016-10-27 15:57:15 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2016-10-31 21:23:22 -0400 |
| commit | e6bca1c97afaea818b8f41a3e39d0eb25910219d (patch) | |
| tree | 042fa93a4d905a45c6d2d2b73cfc26601ade98bf /src/import/chips/p9/procedures/xml/attribute_info | |
| parent | fde2240fafb48866ef3324f57ae7f4417625ad18 (diff) | |
| download | talos-hostboot-e6bca1c97afaea818b8f41a3e39d0eb25910219d.tar.gz talos-hostboot-e6bca1c97afaea818b8f41a3e39d0eb25910219d.zip | |
Change bad bit processing to process bad bit attributes
Better process rank-pairs rather than per-DP
Change-Id: Iab8e21a934368fcf201f0e7b91aa8b859b3b0e47
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31926
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Dev-Ready: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31928
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/memory_dq_attributes.xml | 49 |
1 files changed, 34 insertions, 15 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_dq_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_dq_attributes.xml index 6dab3219e..673346c8c 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_dq_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_dq_attributes.xml @@ -22,21 +22,40 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> + <attributes> - <attribute> - <id>ATTR_MSS_VPD_DQ_MAP</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - [PORT][Dimm DQ PIN] The map from the Dual Inline Memory Module (DIMM) Data (DQ) Pin to the Module Package Data (DQ) Pinout - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <writeable/> - <mssUnits></mssUnits> - <mssBlobStart>0</mssBlobStart> - <mssBlobLength>144</mssBlobLength> - <mssAccessorName>vpd_dq_map</mssAccessorName> - <array>2 72</array> - </attribute> + + <attribute> + <id>ATTR_MSS_VPD_DQ_MAP</id> + <targetType>TARGET_TYPE_MCS</targetType> + <description> + [PORT][Dimm DQ PIN] The map from the Dual Inline Memory Module (DIMM) Data (DQ) Pin to the Module Package Data (DQ) Pinout + </description> + <initToZero></initToZero> + <valueType>uint8</valueType> + <writeable/> + <mssUnits></mssUnits> + <mssBlobStart>0</mssBlobStart> + <mssBlobLength>144</mssBlobLength> + <mssAccessorName>vpd_dq_map</mssAccessorName> + <array>2 72</array> + </attribute> + + <attribute> + <id>ATTR_BAD_DQ_BITMAP</id> + <targetType>TARGET_TYPE_MCS</targetType> + <description> + Bad DQ bitmap from a controller point of view. + The data is a 10 byte bitmap for each of 4 possible ranks. + The bad DQ data is stored in NVRAM, and it is stored in a special format + translated to a DIMM Connector point of view. + All of these details are hidden from the user of this attribute. + </description> + <valueType>uint8</valueType> + <array>2 2 4 10</array> + <platInit/> + <initToZero/> + <writeable/> + </attribute> </attributes> |
