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author | Joe McGill <jmcgill@us.ibm.com> | 2016-12-19 19:34:39 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-01-04 17:30:00 -0500 |
commit | 7f89db8c75fe7efdfd95adec93ef9dbdbf0edc3e (patch) | |
tree | d016491676131d2557a8f335a533a70aa74f38fd /src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml | |
parent | a5a056312006942f7a12cad606f570def4d3b37b (diff) | |
download | talos-hostboot-7f89db8c75fe7efdfd95adec93ef9dbdbf0edc3e.tar.gz talos-hostboot-7f89db8c75fe7efdfd95adec93ef9dbdbf0edc3e.zip |
p9_htm_setup -- update default VGTARGET state, ensure toggle on MEM_ALLOC
Change-Id: I4c47de2331a334fc629456257b440ebd1132fd71
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34074
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34075
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml index af7f820ff..0d0886206 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml @@ -498,7 +498,7 @@ <id>ATTR_HTMSC_MODE_VGTARGET</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> Nest HTM: VG target mode. - HTM Collection Mode Register (24:39). + Stores inverse of HTM Collection Mode Register (24:39). Vg Target bits should be configured if HTM_MEM[scope] is Vg or if Disable Group Scope=1 </description> |