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| author | Andre Marin <aamarin@us.ibm.com> | 2017-08-30 10:42:08 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-09-25 22:16:03 -0400 |
| commit | 7085e6bb6afc0c22ac6b0bb5f2e67b59d1d0f993 (patch) | |
| tree | 2a1d0a417eaa76579f20123c213810b57829705e /src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml | |
| parent | 84e9979022484372224d5b1a4ed44d7d2989bfe3 (diff) | |
| download | talos-hostboot-7085e6bb6afc0c22ac6b0bb5f2e67b59d1d0f993.tar.gz talos-hostboot-7085e6bb6afc0c22ac6b0bb5f2e67b59d1d0f993.zip | |
Add Write CRC attributes to xml and eff_dimm
Added ATTR_EFF_PACKAGE_RANK_MAP, ATTR_EFF_NIBBLE_MAP, and
ATTR_MSS_EFF_WR_CRC attributes.
Change-Id: Ib665e22ce755282afb012ca0df9c670770fa1dd6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45386
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Dev-Ready: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45406
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml')
| -rwxr-xr-x | src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml index cad97abf9..10bbf9e59 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_spd_attributes.xml @@ -658,4 +658,35 @@ <array>2 2</array> <mssAccessorName>eff_register_rev</mssAccessorName> </attribute> + + <attribute> + <id>ATTR_EFF_PACKAGE_RANK_MAP</id> + <targetType>TARGET_TYPE_MCS</targetType> + <description> + Package Rank Map + Decodes SPD Byte 60 - 77 (Bits 7~6) + creator: mss_eff_cnfg + </description> + <initToZero></initToZero> + <valueType>uint8</valueType> + <writeable/> + <array>2 2 18</array> + <mssAccessorName>eff_package_rank_map</mssAccessorName> + </attribute> + + <attribute> + <id>ATTR_EFF_NIBBLE_MAP</id> + <targetType>TARGET_TYPE_MCS</targetType> + <description> + Nibble Map + Decodes SPD Byte 60 - 77 (Bits 5~0) + creator: mss_eff_cnfg + </description> + <initToZero></initToZero> + <valueType>uint8</valueType> + <writeable/> + <array>2 2 18</array> + <mssAccessorName>eff_nibble_map</mssAccessorName> + </attribute> + </attributes> |
