Add LRDIMM to translation register infrastructure and unit tests.

Fix row # for different SDRAM densities in dimm::kind.
Created functions for common patterns to facilitate the creation
of common debug print statements.  This helps create unit tests
debugibility and assures that the correct bits are being set.

Change-Id: I36ea2ba8bfc299f6c69a0d744c4caf2436e37f14
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32150
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32166
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 28 insertions, 19 deletions

diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
index d7b7e689b..ec12da982 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
@@ -222,6 +222,16 @@
         </description>
         <initToZero></initToZero>
         <valueType>uint32</valueType>
+        <enum>
+          4GB = 4,
+          8GB = 8,
+          16GB = 16,
+          32GB = 32,
+          64GB = 64,
+          128GB = 128,
+          256GB = 256,
+          512GB = 512
+        </enum>
         <writeable/>
         <array> 2 2</array>
         <mssUnits>GB</mssUnits>
@@ -1128,14 +1138,24 @@
     </attribute>
 
     <attribute>
-        <id>ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>Specifies the number of master ranks per DIMM.</description>
-        <initToZero></initToZero>
-        <valueType>uint8</valueType>
-        <writeable/>
-        <array> 2 2</array>
-        <mssAccessorName>eff_num_master_ranks_per_dimm</mssAccessorName>
+      <id>ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM</id>
+      <targetType>TARGET_TYPE_MCS</targetType>
+      <description>
+        Specifies the number of master ranks per DIMM.
+        Represents the number of physical ranks on a DIMM.
+        From SPD spec JEDEC Standard No. 21-C: Page 4.1.2.L-4.
+        Byte 12 (Bits 5~3) Number of package ranks per DIMM.
+        Package ranks per DIMM refers to the collections of devices
+        on the module sharing common chip select signals.
+      </description>
+      <initToZero></initToZero>
+      <valueType>uint8</valueType>
+      <enum>
+        1R = 1, 2R = 2, 4R = 4, 8R = 8
+      </enum>
+      <writeable/>
+      <array> 2 2</array>
+      <mssAccessorName>eff_num_master_ranks_per_dimm</mssAccessorName>
     </attribute>
 
     <attribute>
@@ -1153,17 +1173,6 @@
     </attribute>
 
     <attribute>
-        <id>ATTR_EFF_NUM_PACKAGES_PER_RANK</id>
-        <targetType>TARGET_TYPE_MCS</targetType>
-        <description>Specifies the number of DRAM packages per rank.</description>
-        <initToZero></initToZero>
-        <valueType>uint8</valueType>
-        <writeable/>
-        <array> 2 2</array>
-        <mssAccessorName>eff_num_packages_per_rank</mssAccessorName>
-    </attribute>
-
-    <attribute>
         <id>ATTR_EFF_PRIM_DIE_COUNT</id>
         <targetType>TARGET_TYPE_MCS</targetType>
         <description>Specifies the number of DRAM dies per package.</description>