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authorBrian Silver <bsilver@us.ibm.com>2016-10-20 11:49:39 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2016-11-09 16:57:51 -0500
commit5632ecb38190e997973b5234f553b412a549bfdc (patch)
tree4dc059fc3fdc10bccdb6ae3ce572f7e2c15f5879 /src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
parentb225eef341b12b79a35688dfeb5f2dc596f9efd8 (diff)
downloadtalos-hostboot-5632ecb38190e997973b5234f553b412a549bfdc.tar.gz
talos-hostboot-5632ecb38190e997973b5234f553b412a549bfdc.zip
Enable read VREF calibration
Slow the vref cal to as slow as possible Update unit tests, add changes to master for f/w Depends-On: Iab8e21a934368fcf201f0e7b91aa8b859b3b0e47 Change-Id: I1da1e0de254f2b2671c9c7d555620ef3cd3cb6a4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31556 Dev-Ready: Brian R. Silver <bsilver@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31560 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml')
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
index 1105b3f5d..d7b7e689b 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml
@@ -1927,7 +1927,7 @@
<id>ATTR_MSS_CAL_STEP_ENABLE</id>
<targetType>TARGET_TYPE_MCS</targetType>
<description>
- A bit vector denoting valid cal steps to run (0 is left most bit)
+ A bit map of vector denoting valid cal steps to run (0 is left most bit)
[0] EXT_ZQCAL
[1] WR_LEVEL
[2] DQS_ALIGN
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