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| author | dchowe <dchowe@us.ibm.com> | 2017-09-06 10:02:56 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-09-08 18:18:59 -0400 |
| commit | e0c44c4c489e40b92ff0071142088c5f8b9809de (patch) | |
| tree | 6a28478489d2e0987ccc430ed5b56f165ce3a023 /src/import/chips/p9/procedures/hwp | |
| parent | fd99c868ea90d82e033a857e350c46b5bc4ae8a1 (diff) | |
| download | talos-hostboot-e0c44c4c489e40b92ff0071142088c5f8b9809de.tar.gz talos-hostboot-e0c44c4c489e40b92ff0071142088c5f8b9809de.zip | |
Add Zeppelin Epsilon settings
Change-Id: I384358fcab3c1fcb214710e624c2e06c5c2a1001
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45704
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45707
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C | 39 |
1 files changed, 27 insertions, 12 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C index 68b5aeec4..fcbf75eb8 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C @@ -66,6 +66,13 @@ const uint32_t EPSILON_R_T2_HE[] = { 187, 189, 191, 194, 199, 223 }; const uint32_t EPSILON_W_T0_HE[] = { 12, 13, 14, 16, 18, 30 }; const uint32_t EPSILON_W_T1_HE[] = { 96, 97, 98, 99, 102, 114 }; +// HE epsilon (flat 4 Zeppelin) +const uint32_t EPSILON_R_T0_F4[] = { 7, 7, 8, 8, 10, 22 }; +const uint32_t EPSILON_R_T1_F4[] = { 7, 7, 8, 8, 10, 22 }; +const uint32_t EPSILON_R_T2_F4[] = { 83, 84, 87, 90, 95, 119 }; +const uint32_t EPSILON_W_T0_F4[] = { 0, 0, 0, 0, 0, 5 }; +const uint32_t EPSILON_W_T1_F4[] = { 18, 19, 20, 22, 24, 36 }; + // HE epsilon (flat 8 configuration) const uint32_t EPSILON_R_T0_F8[] = { 7, 7, 8, 8, 10, 22 }; const uint32_t EPSILON_R_T1_F8[] = { 7, 7, 8, 8, 10, 22 }; @@ -172,33 +179,40 @@ p9_fbc_eff_config_calc_epsilons( switch(l_eps_table_type) { case fapi2::ENUM_ATTR_PROC_EPS_TABLE_TYPE_EPS_TYPE_HE: + if (l_pump_mode == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_NODE) { l_eps_r[0] = EPSILON_R_T0_HE[i_core_floor_ratio]; + l_eps_r[1] = EPSILON_R_T1_HE[i_core_floor_ratio]; + l_eps_r[2] = EPSILON_R_T2_HE[i_core_floor_ratio]; + + l_eps_w[0] = EPSILON_W_T0_HE[i_core_floor_ratio]; + l_eps_w[1] = EPSILON_W_T1_HE[i_core_floor_ratio]; } else { - l_eps_r[0] = EPSILON_R_T1_HE[i_core_floor_ratio]; - } + l_eps_r[0] = EPSILON_R_T0_F4[i_core_floor_ratio]; + l_eps_r[1] = EPSILON_R_T1_F4[i_core_floor_ratio]; + l_eps_r[2] = EPSILON_R_T2_F4[i_core_floor_ratio]; - l_eps_r[1] = EPSILON_R_T1_HE[i_core_floor_ratio]; - l_eps_r[2] = EPSILON_R_T2_HE[i_core_floor_ratio]; + l_eps_w[0] = EPSILON_W_T0_F4[i_core_floor_ratio]; + l_eps_w[1] = EPSILON_W_T1_F4[i_core_floor_ratio]; + } - l_eps_w[0] = EPSILON_W_T0_HE[i_core_floor_ratio]; - l_eps_w[1] = EPSILON_W_T1_HE[i_core_floor_ratio]; break; case fapi2::ENUM_ATTR_PROC_EPS_TABLE_TYPE_EPS_TYPE_HE_F8: + l_eps_r[0] = EPSILON_R_T0_F8[i_core_floor_ratio]; + if (l_pump_mode == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_NODE) { - l_eps_r[0] = EPSILON_R_T0_F8[i_core_floor_ratio]; + l_eps_r[1] = EPSILON_R_T1_F8[i_core_floor_ratio]; } else { - l_eps_r[0] = EPSILON_R_T1_F8[i_core_floor_ratio]; + l_eps_r[1] = EPSILON_R_T0_F8[i_core_floor_ratio]; } - l_eps_r[1] = EPSILON_R_T1_F8[i_core_floor_ratio]; l_eps_r[2] = EPSILON_R_T2_F8[i_core_floor_ratio]; l_eps_w[0] = EPSILON_W_T0_F8[i_core_floor_ratio]; @@ -206,16 +220,17 @@ p9_fbc_eff_config_calc_epsilons( break; case fapi2::ENUM_ATTR_PROC_EPS_TABLE_TYPE_EPS_TYPE_LE: + l_eps_r[0] = EPSILON_R_T0_LE[i_core_floor_ratio]; + if (l_pump_mode == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_NODE) { - l_eps_r[0] = EPSILON_R_T0_LE[i_core_floor_ratio]; + l_eps_r[1] = EPSILON_R_T1_LE[i_core_floor_ratio]; } else { - l_eps_r[0] = EPSILON_R_T1_LE[i_core_floor_ratio]; + l_eps_r[1] = EPSILON_R_T0_LE[i_core_floor_ratio]; } - l_eps_r[1] = EPSILON_R_T1_LE[i_core_floor_ratio]; l_eps_r[2] = EPSILON_R_T2_LE[i_core_floor_ratio]; l_eps_w[0] = EPSILON_W_T0_LE[i_core_floor_ratio]; |
