STOP/PState: SGPE/PGPE Error Handling Support

Upon PGPE Halt
1) SGPE performs STOP Recovery Trigger to set
a malfunction alert and removes PGPE IPCs
from wake-up decisions.
2) CME is interrupted by QPPM OCC Heartbeat
Lost that PGPE stopped updating

Upon SGPE Halt
1) PGPE moves to Psafe
2) PGPE performs STOP Recovery Trigger to set
a malfunction alert.

This commit also includes SGPE Panic Code
Cleanup such as debug halt support.
However PGPE Panic Code Cleanup is dealt in
a different commit

Key_Cronus_Test=PM_REGRESS

Change-Id: I893aa1ef21d2f684722b8c10dbbeb92b9505c1c4
CQ: SW410252
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49275
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49430
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

2 files changed, 9 insertions, 1 deletions

diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
index 9f3584de0..e187882ca 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
@@ -68,6 +68,12 @@ enum PM_GPE_OCCFLG_DEFS
     REQUEST_OCC_SAFE_STATE                  = 31
 };
 
+//Enum form of OCC FLAG2.
+enum PM_GPE_OCCFLG2_DEFS
+{
+    STOP_RECOVERY_TRIGGER_ENABLE            = 29
+};
+
 //
 //Enum form of OCC SCRATCH2.
 //
@@ -82,6 +88,7 @@ enum PM_GPE_OCC_SCRATCH2_DEFS
     PGPE_DEBUG_TRAP_ENABLE                  = 10,
     L3_CONTAINED_MODE                       = 11,
     PGPE_SAFE_MODE_ERROR                    = 12,
+    PM_DEBUG_HALT_ENABLE                    = 15,
     PGPE_OP_TRACE_DISABLE                   = 24,
     PGPE_OP_TRACE_MEM_MODE                  = 25
 };
@@ -104,6 +111,7 @@ enum PM_CME_FLAGS_DEFS
     CME_FLAGS_STOP_BLOCK_ENTRY_C0           = 10,
     CME_FLAGS_STOP_BLOCK_ENTRY_C1           = 11,
     CME_FLAGS_CORE_QUIESCE_ACTIVE           = 12,
+    CME_FLAGS_PM_DEBUG_HALT_ENABLE          = 13,
     CME_FLAGS_WAIT_ON_PSTATE_START          = 14,
     CME_FLAGS_PSTATES_ENABLED               = 24,
     CME_FLAGS_FREQ_UPDT_DISABLE             = 25,
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C
index e82e1034e..24f4d14b7 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C
@@ -173,7 +173,7 @@ fapi2::ReturnCode pstate_gpe_init(
         do
         {
             FAPI_TRY(getScom(i_target, PU_OCB_OCI_OCCS2_SCOM, l_occ_scratch2));
-            FAPI_TRY(getScom(i_target, PU_GPE3_PPE_XIDBGPRO, l_xsr_iar));
+            FAPI_TRY(getScom(i_target, PU_GPE2_PPE_XIDBGPRO, l_xsr_iar));
             FAPI_DBG("OCC Scratch2: 0x%016lx; XSR: 0x%016lx Timeout: %d",
                      l_occ_scratch2, l_xsr_iar, l_timeout_counter);
             // fapi2::delay takes ns as the arg