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authorGreg Still <stillgs@us.ibm.com>2018-03-09 16:43:33 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-03-15 15:14:14 -0400
commitcbcd27d3a6292e709ab4b22811364b1abc47441a (patch)
treea1d2dc80a16d24d465383a3ff38e740b625adb75 /src/import/chips/p9/procedures/hwp
parentb1e597ec9bdb0df07fc3e492d208fdc8f46fed64 (diff)
downloadtalos-hostboot-cbcd27d3a6292e709ab4b22811364b1abc47441a.tar.gz
talos-hostboot-cbcd27d3a6292e709ab4b22811364b1abc47441a.zip
PM: p9_setup_evid steps voltage to avoid Fleetwood VRM limitations
- use the present value of ATTR_EXT_VRM_STEPSIZE (used by PGPE for Pstate movement) to step the the boot voltage setup during istep 8. This attribute defaults to 50mV. - Done only for rails attached via AVSBus Key_Cronus_Test=PM_REGRESS Change-Id: I63feb361323246c8b92f1e96dc41f8fc19bd0912 CQ: SW420343 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55386 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55395 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_avsbus_lib.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C3
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C154
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H7
4 files changed, 142 insertions, 26 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_avsbus_lib.C b/src/import/chips/p9/procedures/hwp/lib/p9_avsbus_lib.C
index 3875806ce..e177c8940 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_avsbus_lib.C
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_avsbus_lib.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -71,7 +71,7 @@ uint32_t avsCRCcalc(const uint32_t i_avs_cmd)
l_msb = l_msb >> 1;
}
- FAPI_INF("The computed CRC Value is %d", o_crc_value)
+ FAPI_DBG("Computed CRC Value = %d", o_crc_value)
return o_crc_value;
}
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C
index c0a443399..c2a6d8593 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C
@@ -438,6 +438,7 @@ p9_pm_reset_psafe_update(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ta
fapi2::ATTR_FREQ_PROC_REFCLOCK_KHZ_Type l_freq_proc_refclock_khz;
fapi2::ATTR_PROC_DPLL_DIVIDER_Type l_proc_dpll_divider;
fapi2::ATTR_SAFE_MODE_NOVDM_UPLIFT_MV_Type l_uplift_mv;
+ fapi2::ATTR_EXTERNAL_VRM_STEPSIZE_Type l_ext_vrm_step_size_mv;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SAFE_MODE_FREQUENCY_MHZ, i_target, l_attr_safe_mode_freq_mhz));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SAFE_MODE_VOLTAGE_MV, i_target, l_attr_safe_mode_mv));
@@ -447,6 +448,7 @@ p9_pm_reset_psafe_update(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ta
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_DPLL_DIVIDER, i_target, l_proc_dpll_divider));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_PROC_REFCLOCK_KHZ, FAPI_SYSTEM, l_freq_proc_refclock_khz));
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SAFE_MODE_NOVDM_UPLIFT_MV, i_target, l_uplift_mv));
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXTERNAL_VRM_STEPSIZE, FAPI_SYSTEM, l_ext_vrm_step_size_mv));
l_attr_safe_mode_mv += l_uplift_mv;
do
@@ -556,6 +558,7 @@ p9_pm_reset_psafe_update(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ta
l_vdd_bus_num,
l_vdd_bus_rail,
l_vdd_voltage_mv,
+ l_ext_vrm_step_size_mv,
VDD_SETUP),
"Error from VDD setup function");
}
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C b/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C
index 42bf05e86..15af9ab31 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -261,6 +261,7 @@ compute_boot_safe(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
uint32_t l_ext_vcs_mv = sysparm_uplift(l_int_vcs_mv,
l_ics_ma,
attrs->r_loadline_vcs_uohm,
+
attrs->r_distloss_vcs_uohm,
attrs->vrm_voffset_vcs_uv);
@@ -392,6 +393,7 @@ p9_setup_evid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, const
attrs.vdd_bus_num,
attrs.vdd_rail_select,
attrs.vdd_voltage_mv,
+ attrs.attr_ext_vrm_step_size_mv,
VDD_SETUP),
"Error from VDD setup function");
}
@@ -402,6 +404,7 @@ p9_setup_evid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, const
attrs.vdn_bus_num,
attrs.vdn_rail_select,
attrs.vdn_voltage_mv,
+ attrs.attr_ext_vrm_step_size_mv,
VDN_SETUP),
"error from VDN setup function");
}
@@ -420,6 +423,7 @@ p9_setup_evid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, const
attrs.vcs_bus_num,
attrs.vcs_rail_select,
attrs.vcs_voltage_mv,
+ attrs.attr_ext_vrm_step_size_mv,
VCS_SETUP),
"error from VCS setup function");
}
@@ -436,12 +440,36 @@ p9_setup_evid_voltageWrite(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_
const uint8_t i_bus_num,
const uint8_t i_rail_select,
const uint32_t i_voltage_mv,
+ const uint32_t i_ext_vrm_step_size_mv,
const P9_SETUP_EVID_CONSTANTS i_evid_value)
{
- uint8_t l_count = 1;
- uint8_t l_goodResponse = 0;
- uint8_t l_throwAssert = 0;
+
+ uint8_t l_goodResponse = 0;
+ uint8_t l_throwAssert = true;
+ uint32_t l_present_voltage_mv;
+ uint32_t l_target_mv;
+ uint32_t l_count;
+ int32_t l_delta_mv = 0;
+ char rail_str[8];
+
+ switch (i_evid_value)
+ {
+ case VCS_SETUP:
+ strcpy(rail_str, "VCS");
+ break;
+
+ case VDD_SETUP:
+ strcpy(rail_str, "VDD");
+ break;
+
+ case VDN_SETUP:
+ strcpy(rail_str, "VDN");
+ break;
+
+ default:
+ ;
+ }
if (i_evid_value != VCS_SETUP)
{
@@ -451,31 +479,115 @@ p9_setup_evid_voltageWrite(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_
"Initializing avsBus VDD/VDN, bridge %d", BRIDGE_NUMBER);
}
+ FAPI_INF("Setting voltage for %s to %d mV", rail_str, i_voltage_mv);
+
+ // Drive AVS Bus with a frame value 0xFFFFFFFF (idle frame) to
+ // initialize the AVS slave
+ FAPI_TRY(avsIdleFrame(i_target, i_bus_num, BRIDGE_NUMBER));
+
+ // Read the present voltage
+
+ // This loop is to ensrue AVSBus Master and Slave are in sync
+ l_count = 0;
+
do
{
- FAPI_INF("Sending an Idle frame before Voltage writes");
-
- // Drive AVS Bus with a frame value 0xFFFFFFFF (idle frame) to
- // initialize the AVS slave
- FAPI_TRY(avsIdleFrame(i_target, i_bus_num, BRIDGE_NUMBER));
-
- // Set Boot voltage
- FAPI_TRY(avsVoltageWrite(i_target,
- i_bus_num,
- BRIDGE_NUMBER,
- i_rail_select,
- i_voltage_mv),
- "Setting voltage via AVSBus %d, Bridge %d",
+
+ FAPI_TRY(avsVoltageRead(i_target, i_bus_num, BRIDGE_NUMBER,
+ i_rail_select, l_present_voltage_mv),
+ "AVS Voltage read transaction failed to %d, Bridge %d",
i_bus_num,
BRIDGE_NUMBER);
-
// Throw an assertion if we don't get a good response.
- l_throwAssert = l_count >= AVSBUS_VOLTAGE_WRITE_RETRY_COUNT;
- FAPI_TRY(avsValidateResponse(i_target, i_bus_num, BRIDGE_NUMBER, l_throwAssert, l_goodResponse));
+ l_throwAssert = (l_count >= AVSBUS_RETRY_COUNT);
+ FAPI_TRY(avsValidateResponse(i_target, i_bus_num, BRIDGE_NUMBER,
+ l_throwAssert, l_goodResponse));
+
+ if (!l_goodResponse)
+ {
+ FAPI_TRY(avsIdleFrame(i_target, i_bus_num, BRIDGE_NUMBER));
+ }
l_count++;
}
- while (l_goodResponse == 0);
+ while (!l_goodResponse);
+
+ // Compute the delta
+ l_delta_mv = l_present_voltage_mv - i_voltage_mv;
+
+ if (l_delta_mv > 0)
+ {
+ FAPI_DBG("Decreasing voltage - delta = %d", l_delta_mv );
+ }
+ else if (l_delta_mv < 0)
+ {
+ FAPI_DBG("Increasing voltage - delta = %d", l_delta_mv );
+ }
+ else
+ {
+ FAPI_DBG("Voltage to be set equals the initial voltage");
+ }
+
+ // Break into steps limited by attr.attr_ext_vrm_step_size_mv
+ while (l_delta_mv)
+ {
+ // Hostboot doesn't support abs()
+ uint32_t l_abs_delta_mv = l_delta_mv < 0 ? -l_delta_mv : l_delta_mv;
+
+ if (l_abs_delta_mv > i_ext_vrm_step_size_mv)
+ {
+ if (l_delta_mv > 0) // Decreasing
+ {
+ l_target_mv = l_present_voltage_mv - i_ext_vrm_step_size_mv;
+ }
+ else
+ {
+ l_target_mv = l_present_voltage_mv + i_ext_vrm_step_size_mv;
+ }
+ }
+ else
+ {
+ l_target_mv = i_voltage_mv;
+ }
+
+ FAPI_INF("Target voltage = %d; Present voltage = %d",
+ l_target_mv, l_present_voltage_mv);
+
+ l_count = 0;
+
+ do
+ {
+ FAPI_INF("Moving voltage to %d; retry count = %d", l_target_mv, l_count);
+ // Set Boot voltage
+ FAPI_TRY(avsVoltageWrite(i_target,
+ i_bus_num,
+ BRIDGE_NUMBER,
+ i_rail_select,
+ l_target_mv),
+ "Setting voltage via AVSBus %d, Bridge %d",
+ i_bus_num,
+ BRIDGE_NUMBER);
+
+ // Throw an assertion if we don't get a good response.
+ l_throwAssert = l_count >= AVSBUS_RETRY_COUNT;
+ FAPI_TRY(avsValidateResponse(i_target,
+ i_bus_num,
+ BRIDGE_NUMBER,
+ l_throwAssert,
+ l_goodResponse));
+
+ if (!l_goodResponse)
+ {
+ FAPI_TRY(avsIdleFrame(i_target, i_bus_num, BRIDGE_NUMBER));
+ }
+
+ l_count++;
+ }
+ while (!l_goodResponse);
+
+ l_present_voltage_mv = l_target_mv;
+ l_delta_mv = l_present_voltage_mv - i_voltage_mv;
+ }
fapi_try_exit:
return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H b/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H
index a73f44aab..838783a23 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
+/* Contributors Listed Below - COPYRIGHT 2016,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -47,7 +47,7 @@ enum P9_SETUP_EVID_CONSTANTS
BRIDGE_NUMBER = 1,
// Default voltages if mailbox -> attributes are not setup
- AVSBUS_VOLTAGE_WRITE_RETRY_COUNT = 5,
+ AVSBUS_RETRY_COUNT = 5,
VDD_SETUP = 6,
VDN_SETUP = 7,
VCS_SETUP = 8,
@@ -114,6 +114,7 @@ extern "C"
/// @param [in] i_rail_select AVS bus rail select
/// @param [in] i_voltage_mv voltage value in mv
/// @param [in] i_evid_value EVID setup mode
+/// @param [in] i_ext_vrm_step_size_mv Maximum VRM step size in mv
//@return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
fapi2::ReturnCode
p9_setup_evid_voltageWrite(
@@ -121,9 +122,9 @@ extern "C"
const uint8_t i_bus_num,
const uint8_t i_rail_select,
const uint32_t i_voltage_mv,
+ const uint32_t i_ext_vrm_step_size_mv,
const P9_SETUP_EVID_CONSTANTS i_evid_value);
-
} // extern C
#endif // __P9_SETUP_EVID_H__
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