rename TYPE_NV to TYPE_OBUS_BRICK

Change-Id: I2915e0b76c16f1c789700c0ca300e601fd0c4cdd
RTC:171599
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39676
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39689
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

3 files changed, 69 insertions, 35 deletions

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
index a068dc49d..9bd1ab3fe 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
@@ -70,19 +70,16 @@ const uint64_t FBC_IOO_DL_FIR_MASK    = 0xFCFC3FFFFCFF000CULL;
 const uint64_t FBC_IOO_DL_FIR_MASK_SIM_DD1 = 0xFCFC3FFFFCFF000FULL;
 const uint64_t OBUS_3_LL3_FIR_MASK_SIM_DD1 = 0x300000000000000FULL;
 
-static const uint8_t NV0_POS = 0x0;
-static const uint8_t NV1_POS = 0x1;
-static const uint8_t NV2_POS = 0x2;
-static const uint8_t NV3_POS = 0x3;
-static const uint8_t NV4_POS = 0x4;
-static const uint8_t NV5_POS = 0x5;
+static const uint8_t OBRICK0_POS  = 0x0;
+static const uint8_t OBRICK1_POS  = 0x1;
+static const uint8_t OBRICK2_POS  = 0x2;
+static const uint8_t OBRICK9_POS  = 0x9;
+static const uint8_t OBRICK10_POS = 0xA;
+static const uint8_t OBRICK11_POS = 0xB;
 
-static const uint8_t PERV_OB_CPLT_CONF1_NVA_IOVALID = 0x6;
-static const uint8_t PERV_OB_CPLT_CONF1_NVB_IOVALID = 0x7;
-static const uint8_t PERV_OB_CPLT_CONF1_NVC_IOVALID = 0x8;
-
-static const uint8_t NV_OB0_MASK = 0x1;
-static const uint8_t NV_OB3_MASK = 0x2;
+static const uint8_t PERV_OB_CPLT_CONF1_OBRICKA_IOVALID = 0x6;
+static const uint8_t PERV_OB_CPLT_CONF1_OBRICKB_IOVALID = 0x7;
+static const uint8_t PERV_OB_CPLT_CONF1_OBRICKC_IOVALID = 0x8;
 
 //------------------------------------------------------------------------------
 // Function definitions
@@ -97,7 +94,7 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO
     std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS>> l_obus_chiplets;
     std::vector<fapi2::Target<fapi2::TARGET_TYPE_MCS>> l_mcs_targets;
     std::vector<fapi2::Target<fapi2::TARGET_TYPE_CAPP>> l_capp_targets;
-    std::vector<fapi2::Target<fapi2::TARGET_TYPE_NV>> l_nv_targets;
+    std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS_BRICK>> l_obrick_targets;
     fapi2::buffer<uint64_t> l_ob0data(0x0);
     fapi2::buffer<uint64_t> l_ob3data(0x0);
     uint8_t l_dd1 = 0;
@@ -119,15 +116,15 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO
     if (l_ndl_iovalid)
     {
 
-        l_nv_targets = i_target.getChildren<fapi2::TARGET_TYPE_NV>();
+        l_obrick_targets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS_BRICK>();
 
-        for (auto l_nv_target : l_nv_targets)
+        for (auto l_obrick_target : l_obrick_targets)
         {
-            fapi2::toString(l_nv_target, l_chipletTargetStr, sizeof(l_chipletTargetStr));
+            fapi2::toString(l_obrick_target, l_chipletTargetStr, sizeof(l_chipletTargetStr));
             FAPI_DBG("Setting NDL IOValid for %s...", l_chipletTargetStr);
 
             uint8_t l_unit_pos;
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_nv_target, l_unit_pos),
+            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_obrick_target, l_unit_pos),
                      "Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)");
 
             //Mapping from John Irish (jdirish@us.ibm.com)
@@ -140,32 +137,32 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO
             //OB3    NV0 io_valid(A)    STK2.NTL1..   5
             switch (l_unit_pos)
             {
-                case NV0_POS:
-                    l_ob0data.setBit<PERV_OB_CPLT_CONF1_NVA_IOVALID>();
+                case OBRICK0_POS:
+                    l_ob0data.setBit<PERV_OB_CPLT_CONF1_OBRICKA_IOVALID>();
                     break;
 
-                case NV1_POS:
-                    l_ob0data.setBit<PERV_OB_CPLT_CONF1_NVB_IOVALID>();
+                case OBRICK1_POS:
+                    l_ob0data.setBit<PERV_OB_CPLT_CONF1_OBRICKB_IOVALID>();
                     break;
 
-                case NV2_POS:
-                    l_ob0data.setBit<PERV_OB_CPLT_CONF1_NVC_IOVALID>();
+                case OBRICK2_POS:
+                    l_ob0data.setBit<PERV_OB_CPLT_CONF1_OBRICKC_IOVALID>();
                     break;
 
-                case NV3_POS:
-                    l_ob3data.setBit<PERV_OB_CPLT_CONF1_NVC_IOVALID>();
+                case OBRICK9_POS:
+                    l_ob3data.setBit<PERV_OB_CPLT_CONF1_OBRICKC_IOVALID>();
                     break;
 
-                case NV4_POS:
-                    l_ob3data.setBit<PERV_OB_CPLT_CONF1_NVB_IOVALID>();
+                case OBRICK10_POS:
+                    l_ob3data.setBit<PERV_OB_CPLT_CONF1_OBRICKB_IOVALID>();
                     break;
 
-                case NV5_POS:
-                    l_ob3data.setBit<PERV_OB_CPLT_CONF1_NVA_IOVALID>();
+                case OBRICK11_POS:
+                    l_ob3data.setBit<PERV_OB_CPLT_CONF1_OBRICKA_IOVALID>();
                     break;
 
                 default:
-                    FAPI_ASSERT(false, fapi2::P9_CHIPLET_SCOMINIT_UNSUPPORTED_NV_POS_ERR().set_TARGET(l_nv_target),
+                    FAPI_ASSERT(false, fapi2::P9_CHIPLET_SCOMINIT_UNSUPPORTED_OBRICK_POS_ERR().set_TARGET(l_obrick_target),
                                 "ERROR; Unsupported NV position.");
 
             }
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_npu_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_npu_scominit.C
index 4a3159e1e..c2f47164b 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_npu_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_npu_scominit.C
@@ -54,16 +54,34 @@ fapi2::ReturnCode p9_npu_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CH
 {
     fapi2::ReturnCode l_rc;
     const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
-    auto l_nv_targets = i_target.getChildren<fapi2::TARGET_TYPE_NV>();
-    fapi2::buffer<uint64_t> l_atrmiss = 0;
+    fapi2::buffer<uint64_t> l_atrmiss  = 0;
+    fapi2::buffer<uint16_t> l_pg_value = 0xFFFF; //Init the pg value to bad
+    uint8_t l_attr_chip_unit_pos = 0;
     uint8_t l_dd1 = 0;
 
+    FAPI_DBG("Entering ...");
+
+    //Get perv target for later
+    auto l_perv_tgt = i_target.getChildren<fapi2::TARGET_TYPE_PERV>
+                      (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL);
+
     // Get attribute to check if it is dd1 or dd2
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_P9N_DD1_SPY_NAMES, i_target, l_dd1));
 
-    FAPI_DBG("Entering ...");
+    //Check to see if NPU is valid in PG (N3 chiplet)
+    for (auto l_tgt : l_perv_tgt)
+    {
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_tgt, l_attr_chip_unit_pos));
+
+        if (l_attr_chip_unit_pos == N3_CHIPLET_ID )
+        {
+            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, l_tgt, l_pg_value));
+            break;
+        }
+    }
 
-    if (l_nv_targets.size())
+    //Bit7 == 0 means NPU is good
+    if (!l_pg_value.getBit<7>())
     {
         FAPI_DBG("Invoking p9.npu.scom.initfile...");
         FAPI_EXEC_HWP(l_rc, p9_npu_scom, i_target, FAPI_SYSTEM);
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars.C b/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars.C
index 671829e5e..fb47010a1 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_setup_bars.C
@@ -847,6 +847,12 @@ p9_setup_bars(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
     FAPI_INF("Start");
     fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
     p9_setup_bars_chip_info l_chip_info;
+    fapi2::buffer<uint16_t> l_pg_value = 0xFFFF;
+    uint8_t l_attr_chip_unit_pos = 0;
+
+    //Get perv target for later
+    auto l_perv_tgt = i_target.getChildren<fapi2::TARGET_TYPE_PERV>
+                      (fapi2::TARGET_FILTER_NEST_WEST, fapi2::TARGET_STATE_FUNCTIONAL);
 
     // process chip information
     FAPI_TRY(p9_setup_bars_build_chip_info(i_target,
@@ -862,7 +868,20 @@ p9_setup_bars(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
              "Error from p9_setup_bars_psi");
 
     // NPU
-    if (i_target.getChildren<fapi2::TARGET_TYPE_NV>(fapi2::TARGET_STATE_FUNCTIONAL).size())
+    //Check to see if NPU is valid in PG (N3 chiplet)
+    for (auto l_tgt : l_perv_tgt)
+    {
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_tgt, l_attr_chip_unit_pos));
+
+        if (l_attr_chip_unit_pos == N3_CHIPLET_ID )
+        {
+            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, l_tgt, l_pg_value));
+            break;
+        }
+    }
+
+    //Bit7 == 0 means NPU is good
+    if (!l_pg_value.getBit<7>())
     {
         FAPI_TRY(p9_setup_bars_npu(i_target, FAPI_SYSTEM, l_chip_info),
                  "Error from p9_setup_bars_npu");