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authorCHRISTINA L. GRAVES <clgraves@us.ibm.com>2017-04-19 09:31:37 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2017-11-16 18:04:00 -0500
commitc77a01844e73daceb687660ad32210b217b25b23 (patch)
tree013be67260161c11284e56a180b3d8ab3a9aa422 /src/import/chips/p9/procedures/hwp
parenta656e358f1a1dc63d101de2493fa0a19cacb7d0d (diff)
downloadtalos-hostboot-c77a01844e73daceb687660ad32210b217b25b23.tar.gz
talos-hostboot-c77a01844e73daceb687660ad32210b217b25b23.zip
ADU Level 3 code, changed owner to Josh, and added comments
Change-Id: I562ba1907b98826cfd50a8a8b615952929b95293 Original-Change-Id: I0284435ec138688cb03c4b2f19405ba483886666 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39428 Reviewed-by: JOSHUA L. HANNAN <jlhannan@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: DHRUVARAJ SUBHASH CHANDRAN <dhruvaraj@in.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49800 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C36
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H4
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C17
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H4
4 files changed, 41 insertions, 20 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
index 65c650670..2fa9e8080 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.C
@@ -31,7 +31,7 @@
// *HWP HWP Owner Christina Graves clgraves@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: SBE
//
//--------------------------------------------------------------------------
@@ -67,31 +67,28 @@ extern "C" {
// Process input flag
p9_ADU_oper_flag l_myAduFlag;
l_myAduFlag.getFlag(i_flags);
- FAPI_DBG("l_myAduFlag = %lu", l_myAduFlag);
- //If autoinc is set and this is not a DMA operation unset autoinc before passing the flags through
+ //If autoinc is set and this is not a DMA operation unset autoinc before passing the flags through since autoinc is only allowed for DMA operations
if (l_myAduFlag.getOperationType() != p9_ADU_oper_flag::DMA_PARTIAL)
{
l_myAduFlag.setAutoIncrement(false);
}
- FAPI_DBG("l_myAduFlag = %lu", l_myAduFlag);
-
+ //If we were using autoinc and this is the last granule we need to clear autoinc before the last read/write
if( i_lastGranule && l_myAduFlag.getAutoIncrement() )
{
- //call this function to clear the altd_auto_inc bit before the last iteration
FAPI_TRY(p9_adu_coherent_clear_autoinc(i_target), "Error from p9_adu_coherent_clear_autoinc");
}
+ //If we are doing a read operation read the data
if (i_rnw)
{
- //read the data
FAPI_TRY(p9_adu_coherent_adu_read(i_target, i_firstGranule, i_address, l_myAduFlag, io_data),
"Error from p9_adu_coherent_adu_read");
}
+ //Otherwise this is a write and write the data
else
{
- //write the data
FAPI_TRY(p9_adu_coherent_adu_write(i_target, i_firstGranule, i_address, l_myAduFlag, io_data),
"Error from p9_adu_coherent_adu_write");
}
@@ -99,16 +96,18 @@ extern "C" {
//If we are not in fastmode or this is the last granule, we want to check the status
if ( (i_lastGranule) || (l_myAduFlag.getFastMode() == false) )
{
+ //If we are using autoincrement and this is not the last granule we expect the busy bit to still be set
if ( (l_myAduFlag.getAutoIncrement()) && !i_lastGranule )
{
- // Only expect ADU busy if in AUTOINC AND it's not the last granule
l_busyHandling = EXPECTED_BUSY_BIT_SET;
}
+ //Otherwise we expect the busy bit to be cleared
else
{
l_busyHandling = EXPECTED_BUSY_BIT_CLEAR;
}
+ //We only want to do the status check if this is not a ci operation
if (l_myAduFlag.getOperationType() != p9_ADU_oper_flag::CACHE_INHIBIT)
{
FAPI_TRY(p9_adu_coherent_status_check(i_target, l_busyHandling, false,
@@ -116,7 +115,7 @@ extern "C" {
"Error from p9_adu_coherent_status_check");
}
- //If it's the last read/write
+ //If it's the last read/write cleanup the adu
if (i_lastGranule)
{
FAPI_TRY(p9_adu_coherent_cleanup_adu(i_target),
@@ -125,17 +124,30 @@ extern "C" {
}
fapi_try_exit:
- fapi2::ReturnCode saveError = fapi2::current_err;
+ //If there is an error and we want to cleanup the ADU
if ( fapi2::current_err && l_myAduFlag.getOperFailCleanup() )
{
+ //reset the ADU
(void) p9_adu_coherent_utils_reset_adu(i_target);
uint32_t num_attempts = l_myAduFlag.getNumLockAttempts();
+ //Unlock the ADU
(void) p9_adu_coherent_manage_lock(i_target, false, false, num_attempts);
}
+ //Append the input data to an error if we got an error back
+#ifndef __PPE__
+
+ if (fapi2::current_err)
+ {
+ p9_adu_coherent_append_input_data(i_address, i_rnw, i_flags, fapi2::current_err);
+ }
+
+#endif
+
FAPI_DBG("Exiting...");
- return saveError;
+ //Return the error that we got from up above
+ return fapi2::current_err;
}
} // extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
index f92c9e97a..524a6d11f 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
@@ -27,10 +27,10 @@
/// @file p9_adu_access.H
/// @brief Read coherent state of memory via the ADU (FAPI)
///
-// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
+// *HWP HWP Owner: Joshua Hannan jlhannan@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
-// *HWP Level: 1
+// *HWP Level: 3
// *HWP Consumed by:
// ----------------------------------------------------------------------------------
//
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
index 8736dc254..4ab380490 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
@@ -27,10 +27,10 @@
/// @file p9_adu_setup.C
/// @brief Setup the registers for a read/write to the ADU
//
-// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
+// *HWP HWP Owner: Joshua Hannan jlhannan@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: SBE
//
//--------------------------------------------------------------------------
@@ -111,7 +111,6 @@ extern "C"
"Error from p9_adu_coherent_setup_registers");
fapi_try_exit:
- fapi2::ReturnCode saveError = fapi2::current_err;
//if an error has occurred, ADU is dirty, and instructed to clean up,
//attempt to reset ADU and free lock (propogate rc of original fail)
@@ -121,8 +120,18 @@ extern "C"
(void) p9_adu_coherent_manage_lock(i_target, false, false, num_attempts);
}
+ //Append the input data to an error if we got an error back
+#ifndef __PPE__
+
+ if (fapi2::current_err)
+ {
+ p9_adu_coherent_append_input_data(i_address, i_rnw, i_flags, fapi2::current_err);
+ }
+
+#endif
+
FAPI_DBG("Exiting...");
- return saveError;
+ return fapi2::current_err;
}
} // extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
index 78147e836..ad2f5e456 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
@@ -27,10 +27,10 @@
/// @file p9_adu_setup.H
/// @brief Setup the adu to do reads/writes
//
-// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
+// *HWP HWP Owner: Joshua Hannan jlhannan@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
-// *HWP Level: 1
+// *HWP Level: 3
// *HWP Consumed by:
//-----------------------------------------------------------------------------------
// *! ADDITIONAL COMMENTS:
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