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| author | Daniel Howe <dchowe@us.ibm.com> | 2017-09-13 15:04:26 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-09-18 13:22:43 -0400 |
| commit | c6ba9092bf0c28a62e7c17fadbe0f45c3ae6e3f3 (patch) | |
| tree | db555bd325d6fcd215eb05f82c55d5984cbc730e /src/import/chips/p9/procedures/hwp | |
| parent | f46458856776e03ed6b6e1a2b6eb1b0b60d1af19 (diff) | |
| download | talos-hostboot-c6ba9092bf0c28a62e7c17fadbe0f45c3ae6e3f3.tar.gz talos-hostboot-c6ba9092bf0c28a62e7c17fadbe0f45c3ae6e3f3.zip | |
Revert enable psave in fabric scominit
Change-Id: I4f256edcf71d34ec31e0f4102f7ad190b18a94c4
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46165
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com>
Dev-Ready: DANIEL C. HOWE <dchowe@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46166
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C index 115b8d13f..9e9802b33 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C @@ -62,7 +62,6 @@ const uint64_t FBC_IOE_DL_FIR_ACTION0 = 0x0000000000000000ULL; const uint64_t FBC_IOE_DL_FIR_ACTION1 = 0x0303C00000001FFCULL; const uint64_t FBC_IOE_DL_FIR_MASK = 0xFCFC3FFFFFFFE003ULL; -const uint64_t FBC_IOE_TL_PSAVE_CFG = 0xF1FF01031C000000ULL; //------------------------------------------------------------------------------ // Function definitions //------------------------------------------------------------------------------ @@ -141,12 +140,6 @@ fapi2::ReturnCode p9_chiplet_fabric_scominit(const fapi2::Target<fapi2::TARGET_T "Error from putScom (XBUS_LL0_LL0_LL0_IOEL_FIR_MASK_REG)"); } - if (l_xbus_chiplets.size()) - { - FAPI_TRY(fapi2::putScom(i_target, PU_PB_PSAVE_CFG, FBC_IOE_TL_PSAVE_CFG), - "Error from putScom (PU_PB_PSAVE_CFG)"); - } - // set FBC optics config mode attribute l_obus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS>(); |
