Change PHY APB register block to functional API

Change-Id: I5da4d5fafedf00e5a1f930f68e5455a43cfb334f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23031
Tested-by: Jenkins Server
Tested-by: Hostboot CI
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23032
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

3 files changed, 222 insertions, 219 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.C
index 1e2a5812d..f412c623a 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.C
@@ -35,14 +35,17 @@
 
 namespace mss
 {
+
+namespace apb
+{
+
 ///
 /// @brief APB block FIR check, MCA style
 /// @param[in] i_target fapi2 target of the port
-/// @return fapi2::ReturnCode, FAPI2_RC_SUCCESS if no FIR
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if no FIR
 ///
 template<>
-fapi2::ReturnCode apb<fapi2::TARGET_TYPE_MCA>::fir_check(
-    const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target )
+fapi2::ReturnCode fir_check(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target)
 {
     typedef apbTraits<fapi2::TARGET_TYPE_MCA> TT;
 
@@ -105,5 +108,5 @@ fapi2::ReturnCode apb<fapi2::TARGET_TYPE_MCA>::fir_check(
 fapi_try_exit:
     return fapi2::current_err;
 }
-
-}
+} // close namespace apb
+} // close namespace mss
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.H
index e061d0d16..573faf875 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/apb.H
@@ -95,190 +95,218 @@ class apbTraits<fapi2::TARGET_TYPE_MCA>
 
 };
 
+namespace apb
+{
+
 ///
-/// @class mss::apb
-/// @brief APB class
+/// @brief Read APB_CONFIG0
 /// @tparam T fapi2 Target Type - derived
 /// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target the fapi2 target of the port
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
 ///
 template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
-class apb
+inline fapi2::ReturnCode read_config0( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
 {
-    public:
+    FAPI_TRY( mss::getScom(i_target, TT::APB_CONFIG0_REG, o_data) );
+    FAPI_DBG("apb_config0: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
 
-        ///
-        /// @brief Read APB_CONFIG0
-        /// @param[in] i_target the fapi2 target of the port
-        /// @param[out] o_data the value of the register
-        /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode read_config0( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
-        {
-            FAPI_TRY( mss::getScom(i_target, TT::APB_CONFIG0_REG, o_data) );
-            FAPI_DBG("apb_config0: 0x%016lx", o_data);
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
-
-        ///
-        /// @brief Write APB_CONFIG0
-        /// @param[in] i_target the fapi2 target of the port
-        /// @param[in] i_data the value of the register
-        /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode write_config0( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
-        {
-            FAPI_DBG("apb_config0: 0x%016lx", i_data);
-            FAPI_TRY( mss::putScom(i_target, TT::APB_CONFIG0_REG, i_data) );
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
-
-        ///
-        /// @brief Read APB_ERROR_STATUS0
-        /// @param[in] i_target the fapi2 target of the port
-        /// @param[out] o_data the value of the register
-        /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode read_error_status0( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
-        {
-            FAPI_TRY( mss::getScom(i_target, TT::APB_ERROR_STATUS0_REG, o_data) );
-            FAPI_DBG("apb_error_status0: 0x%016lx", o_data);
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
-
-        ///
-        /// @brief Write APB_ERROR_STATUS0
-        /// @param[in] i_target the fapi2 target of the port
-        /// @param[in] i_data the value of the register
-        /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode write_error_status0( const fapi2::Target<T>& i_target,
-                const fapi2::buffer<uint64_t>& i_data )
-        {
-            FAPI_DBG("apb_error_status0: 0x%016lx", i_data);
-            FAPI_TRY( mss::putScom(i_target, TT::APB_ERROR_STATUS0_REG, i_data) );
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
-
-        ///
-        /// @brief Read APB_FIR_ERR0_REG
-        /// @param[in] i_target the fapi2 target of the port
-        /// @param[out] o_data the value of the register
-        /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode read_fir_err0( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
-        {
-            FAPI_TRY( mss::getScom(i_target, TT::APB_FIR_ERR0_REG, o_data) );
-            FAPI_DBG("apb_fir_err0: 0x%016lx", o_data);
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
-
-        ///
-        /// @brief Read APB_FIR_ERR1_REG
-        /// @param[in] i_target the fapi2 target of the port
-        /// @param[out] o_data the value of the register
-        /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode read_fir_err1( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
-        {
-            FAPI_TRY( mss::getScom(i_target, TT::APB_FIR_ERR1_REG, o_data) );
-            FAPI_DBG("apb_fir_err1: 0x%016lx", o_data);
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
-
-        ///
-        /// @brief Read APB_FIR_ERR2_REG
-        /// @param[in] i_target the fapi2 target of the port
-        /// @param[out] o_data the value of the register
-        /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode read_fir_err2( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
-        {
-            FAPI_TRY( mss::getScom(i_target, TT::APB_FIR_ERR2_REG, o_data) );
-            FAPI_DBG("apb_fir_err2: 0x%016lx", o_data);
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
-
-        ///
-        /// @brief Read APB_FIR_ERR3_REG
-        /// @param[in] i_target the fapi2 target of the port
-        /// @param[out] o_data the value of the register
-        /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode read_fir_err3( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
-        {
-            FAPI_TRY( mss::getScom(i_target, TT::APB_FIR_ERR3_REG, o_data) );
-            FAPI_DBG("apb_fir_err3: 0x%016lx", o_data);
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
-
-        ///
-        /// @brief Reset the error state of the APB block
-        /// @param[in] i_target the fapi2 target of the port
-        /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode reset_err( const fapi2::Target<T>& i_target )
-        {
-            // DDRPHY_APB_CONFIG0_P0_RESET_ERR_RPT
-            // Write this bit to '1'b then write this bit to '0'b (toggle) to reset the
-            // APB error registers.
-            // Does this cover all of them? BRS
-            fapi2::buffer<uint64_t> l_data;
-            FAPI_TRY( read_config0(i_target, l_data) );
-            l_data.setBit<TT::RESET_ERR_RPT>();
-            FAPI_TRY( write_config0(i_target, l_data) );
-            l_data.clearBit<TT::RESET_ERR_RPT>();
-            FAPI_TRY( write_config0(i_target, l_data) );
-
-            // We have to read ERR_STATUS0. It resets when read.
-            FAPI_TRY( read_error_status0(i_target, l_data) );
-
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
-
-        ///
-        /// @brief reset apb_config0
-        /// @param[in] i_target fapi2 target of the port
-        /// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode reset_config0( const fapi2::Target<T>& i_target )
-        {
-            FAPI_TRY( reset_err(i_target) );
-
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
-
-        ///
-        /// @brief reset rc
-        /// @param[in] i_target fapi2 target of the port
-        /// @return fapi2::ReturnCode, FAPI2_RC_SUCCESS if ok
-        ///
-        inline fapi2::ReturnCode reset( const fapi2::Target<T>& i_target )
-        {
-            FAPI_TRY( reset_config0(i_target) );
+///
+/// @brief Write APB_CONFIG0
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target the fapi2 target of the port
+/// @param[in] i_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+inline fapi2::ReturnCode write_config0( const fapi2::Target<T>& i_target, const fapi2::buffer<uint64_t>& i_data )
+{
+    FAPI_DBG("apb_config0: 0x%016lx", i_data);
+    FAPI_TRY( mss::putScom(i_target, TT::APB_CONFIG0_REG, i_data) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Read APB_ERROR_STATUS0
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target the fapi2 target of the port
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+inline fapi2::ReturnCode read_error_status0( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::APB_ERROR_STATUS0_REG, o_data) );
+    FAPI_DBG("apb_error_status0: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
 
-        fapi_try_exit:
-            return fapi2::current_err;
-        }
+///
+/// @brief Write APB_ERROR_STATUS0
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target the fapi2 target of the port
+/// @param[in] i_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+inline fapi2::ReturnCode write_error_status0( const fapi2::Target<T>& i_target,
+        const fapi2::buffer<uint64_t>& i_data )
+{
+    FAPI_DBG("apb_error_status0: 0x%016lx", i_data);
+    FAPI_TRY( mss::putScom(i_target, TT::APB_ERROR_STATUS0_REG, i_data) );
+fapi_try_exit:
+    return fapi2::current_err;
+}
 
-        ///
-        /// @brief APB block FIR check
-        /// @param[in] i_target fapi2 target of the port
-        /// @return fapi2::ReturnCode, FAPI2_RC_SUCCESS if no FIR
-        ///
-        fapi2::ReturnCode fir_check( const fapi2::Target<T>& i_target );
+///
+/// @brief Read APB_FIR_ERR0_REG
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target the fapi2 target of the port
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+inline fapi2::ReturnCode read_fir_err0( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::APB_FIR_ERR0_REG, o_data) );
+    FAPI_DBG("apb_fir_err0: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
 
-};
+///
+/// @brief Read APB_FIR_ERR1_REG
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target the fapi2 target of the port
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+inline fapi2::ReturnCode read_fir_err1( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::APB_FIR_ERR1_REG, o_data) );
+    FAPI_DBG("apb_fir_err1: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Read APB_FIR_ERR2_REG
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target the fapi2 target of the port
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+inline fapi2::ReturnCode read_fir_err2( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::APB_FIR_ERR2_REG, o_data) );
+    FAPI_DBG("apb_fir_err2: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Read APB_FIR_ERR3_REG
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target the fapi2 target of the port
+/// @param[out] o_data the value of the register
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+inline fapi2::ReturnCode read_fir_err3( const fapi2::Target<T>& i_target, fapi2::buffer<uint64_t>& o_data )
+{
+    FAPI_TRY( mss::getScom(i_target, TT::APB_FIR_ERR3_REG, o_data) );
+    FAPI_DBG("apb_fir_err3: 0x%016lx", o_data);
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Reset the error state of the APB block
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target the fapi2 target of the port
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+inline fapi2::ReturnCode reset_err( const fapi2::Target<T>& i_target )
+{
+    // DDRPHY_APB_CONFIG0_P0_RESET_ERR_RPT
+    // Write this bit to '1'b then write this bit to '0'b (toggle) to reset the
+    // APB error registers.
+    // Does this cover all of them? BRS
+    fapi2::buffer<uint64_t> l_data;
+    FAPI_TRY( read_config0(i_target, l_data) );
+    l_data.setBit<TT::RESET_ERR_RPT>();
+    FAPI_TRY( write_config0(i_target, l_data) );
+    l_data.clearBit<TT::RESET_ERR_RPT>();
+    FAPI_TRY( write_config0(i_target, l_data) );
+
+    // We have to read ERR_STATUS0. It resets when read.
+    FAPI_TRY( read_error_status0(i_target, l_data) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
 
+///
+/// @brief reset apb_config0
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target fapi2 target of the port
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+inline fapi2::ReturnCode reset_config0( const fapi2::Target<T>& i_target )
+{
+    FAPI_TRY( reset_err(i_target) );
+
+fapi_try_exit:
+    return fapi2::current_err;
 }
 
+///
+/// @brief reset apb
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target fapi2 target of the port
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+inline fapi2::ReturnCode reset( const fapi2::Target<T>& i_target )
+{
+    FAPI_TRY( reset_config0(i_target) );
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief APB block FIR check
+/// @tparam T fapi2 Target Type - derived
+/// @tparam TT traits type defaults to apbTraits<T>
+/// @param[in] i_target fapi2 target of the port
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if no FIR
+///
+template< fapi2::TargetType T = fapi2::TARGET_TYPE_MCA, typename TT = apbTraits<T> >
+fapi2::ReturnCode fir_check( const fapi2::Target<T>& i_target );
+
+} // close namespace apb
+
+} // close namespace mss
+
 #endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
index 9dfc4d727..00410c57b 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
@@ -64,7 +64,7 @@ fapi2::ReturnCode change_resetn( const fapi2::Target<TARGET_TYPE_MCBIST>& i_targ
 {
     fapi2::buffer<uint64_t> l_data;
 
-    for (auto p : i_target.getChildren<TARGET_TYPE_MCA>())
+    for (const auto& p : i_target.getChildren<TARGET_TYPE_MCA>())
     {
         FAPI_DBG("Change reset to %s PHY: %s", (i_state == HIGH ? "high" : "low"), mss::c_str(p));
 
@@ -89,7 +89,7 @@ fapi2::ReturnCode toggle_zctl( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target
 #if 0
     fapi2::buffer<uint64_t> l_data;
 
-    auto l_ports = i_target.getChildren<TARGET_TYPE_MCA>();
+    const auto l_ports = i_target.getChildren<TARGET_TYPE_MCA>();
     //
     // 4. Write 0x0010 to PC IO PVT N/P FET driver control registers to assert ZCTL reset and enable the internal impedance controller.
     // (SCOM Addr: 0x8000C0140301143F,  0x8000C0140301183F, 0x8001C0140301143F, 0x8001C0140301183F)
@@ -146,7 +146,7 @@ fapi2::ReturnCode change_force_mclk_low (const fapi2::Target<TARGET_TYPE_MCBIST>
     FAPI_DBG("force mclk %s for all ports", (i_state == mss::LOW ? "low" : "high") );
 
     // Might as well do this for all the ports while we're here.
-    for (auto p : i_target.getChildren<TARGET_TYPE_MCA>())
+    for (const auto& p : i_target.getChildren<TARGET_TYPE_MCA>())
     {
         FAPI_TRY(mss::getScom( p, MCA_MBA_FARB5Q, l_data));
 
@@ -324,9 +324,9 @@ fapi2::ReturnCode ddr_phy_flush( const fapi2::Target<TARGET_TYPE_MCBIST>& i_targ
     l_data.setBit<48>().setBit<58>();
     l_mask.setBit<48>().setBit<58>();
 
-    auto l_ports = i_target.getChildren<TARGET_TYPE_MCA>();
+    const auto l_ports = i_target.getChildren<TARGET_TYPE_MCA>();
 
-    for (auto p : l_ports)
+    for (const auto& p : l_ports)
     {
         FAPI_TRY(mss::putScomUnderMask(p, MCA_DDRPHY_PC_POWERDOWN_1_P0, l_data, l_mask) );
     }
@@ -335,7 +335,7 @@ fapi2::ReturnCode ddr_phy_flush( const fapi2::Target<TARGET_TYPE_MCBIST>& i_targ
 
     FAPI_INF("ADR/DP18 FLUSH: 2) clear PC_POWERDOWN_1 register, powerdown enable(48), flush bit(58)");
 
-    for (auto p : l_ports)
+    for (const auto& p : l_ports)
     {
         FAPI_TRY(mss::putScomUnderMask(p, MCA_DDRPHY_PC_POWERDOWN_1_P0, 0, l_mask) );
     }
@@ -345,34 +345,6 @@ fapi_try_exit:
 }
 
 ///
-/// @brief Send a scom to all instances of a block on the phy.
-/// @param[in] i_target the MCA target
-/// @param[in] l_addr the address
-/// @param[in] i_data the value
-/// @note this iterates creating addresses - needs to change to use the
-/// braodcast bits in the phy when we can scom it directly.
-///
-static inline fapi2::ReturnCode phy_block_broadcast( const fapi2::Target<TARGET_TYPE_MCA>& i_target,
-        const uint64_t l_addr,
-        const fapi2::buffer<uint64_t> i_data)
-{
-#ifndef BROADSIDE_SCOM_ONLY
-    static const size_t PHY_INSTANCE_COUNT = 5;
-
-    // We have to use a dull knife since broadisde scom has to have the address in
-    // the scomdef. When we get a full system model (or the PIE driver supports scomming
-    // the PHY) we can use the broadcast bits and iterate over the DIMM ranks.
-    for (size_t i = 0; i < PHY_INSTANCE_COUNT; ++i)
-    {
-        FAPI_TRY( mss::putScom(i_target, l_addr | fapi2::buffer<uint64_t>().insertFromRight<18, 4>(i), i_data) );
-    }
-
-fapi_try_exit:
-    return fapi2::current_err;
-#endif
-}
-
-///
 /// @brief Lock dphy_gckn and sysclk
 /// @param[in] i_target a port target
 /// @return FAPI2_RC_SUCCESS iff ok
@@ -421,7 +393,7 @@ fapi2::ReturnCode bang_bang_lock( const fapi2::Target<TARGET_TYPE_MCBIST>& i_tar
     if (!is_sim)
     {
         // Check for BB lock.
-        for (auto p : i_target.getChildren<TARGET_TYPE_MCA>())
+        for (const auto& p : i_target.getChildren<TARGET_TYPE_MCA>())
         {
             FAPI_DBG("Wait for BB lock in status register, bit %u",
                      MCA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_BB_LOCK);
@@ -457,7 +429,8 @@ fapi2::ReturnCode rank_pair_primary_to_dimm(
     fapi2::buffer<uint64_t> l_data;
     fapi2::buffer<uint64_t> l_rank;
     uint64_t l_rank_on_dimm;
-    auto l_dimms = i_target.getChildren<TARGET_TYPE_DIMM>();
+
+    const auto l_dimms = i_target.getChildren<TARGET_TYPE_DIMM>();
 
     // Sanity check the rank pair
     FAPI_INF("%s rank pair: %d", mss::c_str(i_target), i_rp);
@@ -529,12 +502,11 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC
     fapi2::buffer<uint64_t> l_fir_data;
     fapi2::buffer<uint64_t> l_err_data;
 
-    mss::apb<TARGET_TYPE_MCA> l_apb;
     mss::pc<TARGET_TYPE_MCA>  l_pc;
 
     fapi2::Target<TARGET_TYPE_DIMM> l_failed_dimm;
 
-    FAPI_TRY( l_apb.read_fir_err1(i_target, l_fir_data) );
+    FAPI_TRY( mss::apb::read_fir_err1(i_target, l_fir_data) );
     FAPI_DBG("initial cal FIR: 0x%016llx", uint64_t(l_fir_data));
 
     // If we have no errors, lets get out of here.
@@ -814,7 +786,7 @@ fapi2::ReturnCode phy_scominit(const fapi2::Target<TARGET_TYPE_MCBIST>& i_target
     FAPI_TRY( mss::dp16<TARGET_TYPE_MCA>().setup_io_tx_config0(i_target) );
     FAPI_TRY( mss::dp16<TARGET_TYPE_MCA>().setup_dll_vreg_config1(i_target) );
 
-    for( auto p : i_target.getChildren<TARGET_TYPE_MCA>())
+    for (const auto& p : i_target.getChildren<TARGET_TYPE_MCA>())
     {
         mss::dp16<TARGET_TYPE_MCA> l_dp16;
 
@@ -950,7 +922,7 @@ fapi2::ReturnCode setup_cal_config( const fapi2::Target<fapi2::TARGET_TYPE_MCA>&
     // Note: This rank encoding isn't used if the cal is initiated from the CCS engine
     // as they use the recal inteface.
     // Configure the rank pairs
-    for (auto rp : i_rank_pairs)
+    for (const auto& rp : i_rank_pairs)
     {
         l_cal_config.setBit(MCA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_RANK_PAIR + rp);
     }
@@ -2482,7 +2454,7 @@ fapi2::ReturnCode dump_regs( const fapi2::Target<TARGET_TYPE_MCA>& i_target )
         {"MCA_DDRPHY_WC_RTT_WR_SWAP_ENABLE_P0", MCA_DDRPHY_WC_RTT_WR_SWAP_ENABLE_P0 },
     };
 
-    for (auto r : l_registers)
+    for (const auto& r : l_registers)
     {
         fapi2::buffer<uint64_t> l_data;
         FAPI_TRY( mss::getScom(i_target, r.second, l_data) );