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| author | Brian Silver <bsilver@us.ibm.com> | 2016-09-06 07:18:57 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2016-09-21 16:38:43 -0400 |
| commit | 92fbd675918101f1b5ab446c061ea33881b3c62b (patch) | |
| tree | 2e5efb31f1a6996265f2fd6aa613505c22de69f4 /src/import/chips/p9/procedures/hwp | |
| parent | 80b83dfca290b7a69c0b365314f972c0b8eb00f6 (diff) | |
| download | talos-hostboot-92fbd675918101f1b5ab446c061ea33881b3c62b.tar.gz talos-hostboot-92fbd675918101f1b5ab446c061ea33881b3c62b.zip | |
Add enforcement of DDR4 DRAM on Nimbus via plug rules
Change-Id: I4e98cf7a1af5176c89f611585fbd72d425d99751
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29245
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29246
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C | 19 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.C | 2 |
2 files changed, 18 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C index 6840e1473..fb6ce8347 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C @@ -137,13 +137,28 @@ fapi2::ReturnCode dimm_type_mixing(std::vector<dimm::kind>& io_kinds) for (const auto& k : io_kinds) { // Sets fapi2::current_err - MSS_ASSERT_NOEXIT( ((k.iv_dimm_type == l_winner.first) || (k.iv_dimm_type == fapi2::ENUM_ATTR_EFF_DIMM_TYPE_EMPTY)), + MSS_ASSERT_NOEXIT( ((k.iv_dimm_type == l_winner.first) || + (k.iv_dimm_type == fapi2::ENUM_ATTR_EFF_DIMM_TYPE_EMPTY)), fapi2::MSS_PLUG_RULES_INVALID_DIMM_TYPE_MIX() .set_DIMM_TYPE(k.iv_dimm_type) .set_MAJORITY_DIMM_TYPE(l_winner.first) .set_DIMM_TARGET(k.iv_target), "%s of type %d can not be plugged in with DIMM of type %d", - mss::c_str(k.iv_target), k.iv_dimm_type, l_winner.first); + mss::c_str(k.iv_target), k.iv_dimm_type, l_winner.first ); + + // This should never fail ... but Just In Case a little belt-and-suspenders never hurt. + // Later on down the line we make the assumption that effective config caught any mimatched + // DRAM generations - so we ought to at least do that ... + // TODO RTC:160395 This needs to change for controllers which support different generations, of which + // Nimbus does not. + MSS_ASSERT_NOEXIT( ((k.iv_dram_generation == fapi2::ENUM_ATTR_EFF_DRAM_GEN_DDR4) || + (k.iv_dram_generation == fapi2::ENUM_ATTR_EFF_DRAM_GEN_EMPTY)), + fapi2::MSS_PLUG_RULES_INVALID_DRAM_GEN() + .set_DRAM_GEN(k.iv_dimm_type) + .set_DIMM_TARGET(k.iv_target), + "%s is not DDR4 it is %d", + mss::c_str(k.iv_target), k.iv_dram_generation ); + } return fapi2::current_err; diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.C index 0bcf3350a..025eee61f 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.C @@ -40,7 +40,7 @@ #include <fapi2.H> // mss lib -#include <raw_cards.H> +#include <lib/spd/rdimm/raw_cards.H> namespace mss { |
