Add DIMM to PHY mapping to access_delay_regs

  Add mss::is_odd util function

Change-Id: Ia549f538e139e5431531e33f76d04ab4b64cf466
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29889
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30582
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

4 files changed, 50 insertions, 17 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mbs_error_vector_trap.H b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mbs_error_vector_trap.H
index eea838239..732f334ad 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mbs_error_vector_trap.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/ecc/mbs_error_vector_trap.H
@@ -105,8 +105,8 @@ inline void set_nce_galois( const fapi2::Target<T>& i_target,
 {
     const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
 
-    // divide by 2 because each register holds info for a pair of ports
-    if ((l_port % 2) == 0)
+    // check for even/odd since each register holds info for a pair of ports
+    if (!mss::is_odd(l_port))
     {
         io_data.insertFromRight<TT::P0_NCE_GALOIS, TT::P0_NCE_GALOIS_LEN>(i_value);
     }
@@ -133,8 +133,8 @@ inline void get_nce_galois( const fapi2::Target<T>& i_target,
 {
     const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
 
-    // divide by 2 because each register holds info for a pair of ports
-    if ((l_port % 2) == 0)
+    // check for even/odd since each register holds info for a pair of ports
+    if (!mss::is_odd(l_port))
     {
         i_data.extractToRight<TT::P0_NCE_GALOIS, TT::P0_NCE_GALOIS_LEN>(o_value);
     }
@@ -161,8 +161,8 @@ inline void set_nce_magnitude( const fapi2::Target<T>& i_target,
 {
     const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
 
-    // divide by 2 because each register holds info for a pair of ports
-    if ((l_port % 2) == 0)
+    // check for even/odd since each register holds info for a pair of ports
+    if (!mss::is_odd(l_port))
     {
         io_data.insertFromRight<TT::P0_NCE_MAGNITUDE, TT::P0_NCE_MAGNITUDE_LEN>(i_value);
     }
@@ -189,8 +189,8 @@ inline void get_nce_magnitude( const fapi2::Target<T>& i_target,
 {
     const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
 
-    // divide by 2 because each register holds info for a pair of ports
-    if ((l_port % 2) == 0)
+    // check for even/odd since each register holds info for a pair of ports
+    if (!mss::is_odd(l_port))
     {
         i_data.extractToRight<TT::P0_NCE_MAGNITUDE, TT::P0_NCE_MAGNITUDE_LEN>(o_value);
     }
@@ -217,8 +217,8 @@ inline void set_tce_galois( const fapi2::Target<T>& i_target,
 {
     const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
 
-    // divide by 2 because each register holds info for a pair of ports
-    if ((l_port % 2) == 0)
+    // check for even/odd since each register holds info for a pair of ports
+    if (!mss::is_odd(l_port))
     {
         io_data.insertFromRight<TT::P0_TCE_GALOIS, TT::P0_TCE_GALOIS_LEN>(i_value);
     }
@@ -245,8 +245,8 @@ inline void get_tce_galois( const fapi2::Target<T>& i_target,
 {
     const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
 
-    // divide by 2 because each register holds info for a pair of ports
-    if ((l_port % 2) == 0)
+    // check for even/odd since each register holds info for a pair of ports
+    if (!mss::is_odd(l_port))
     {
         i_data.extractToRight<TT::P0_TCE_GALOIS, TT::P0_TCE_GALOIS_LEN>(o_value);
     }
@@ -273,8 +273,8 @@ inline void set_tce_magnitude( const fapi2::Target<T>& i_target,
 {
     const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
 
-    // divide by 2 because each register holds info for a pair of ports
-    if ((l_port % 2) == 0)
+    // check for even/odd since each register holds info for a pair of ports
+    if (!mss::is_odd(l_port))
     {
         io_data.insertFromRight<TT::P0_TCE_MAGNITUDE, TT::P0_TCE_MAGNITUDE_LEN>(i_value);
     }
@@ -301,8 +301,8 @@ inline void get_tce_magnitude( const fapi2::Target<T>& i_target,
 {
     const auto& l_port = mss::relative_pos<fapi2::TARGET_TYPE_MCBIST>(i_target);
 
-    // divide by 2 because each register holds info for a pair of ports
-    if ((l_port % 2) == 0)
+    // check for even/odd since each register holds info for a pair of ports
+    if (!mss::is_odd(l_port))
     {
         i_data.extractToRight<TT::P0_TCE_MAGNITUDE, TT::P0_TCE_MAGNITUDE_LEN>(o_value);
     }
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H
index 333698600..460b0725c 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H
@@ -45,6 +45,7 @@
 #include <lib/eff_config/memory_size.H>
 #include <lib/shared/mss_const.H>
 #include <lib/utils/bit_count.H>
+#include <lib/utils/num.H>
 #include <lib/mcbist/patterns.H>
 #include <lib/mcbist/settings.H>
 
@@ -2254,7 +2255,7 @@ inline fapi2::ReturnCode load_pattern( const fapi2::Target<T>& i_target, uint64_
         // The indexes are split in to even and odd where the odd indexes don't really exist.
         // They're just indicating that we want to grab the even index and invert it. So calculate
         // the proper vector index and acknowledge the inversion if necessary.
-        if ((i_pattern % 2) != 0)
+        if (mss::is_odd(i_pattern))
         {
             l_invert = true;
             i_pattern -= 1;
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/num.H b/src/import/chips/p9/procedures/hwp/memory/lib/utils/num.H
index f025b19df..61a04a680 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/num.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/num.H
@@ -22,3 +22,34 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file num.H
+/// @brief Miscellaneous number checking functions
+///
+// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com>
+// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: HB:FSP
+
+#ifndef _MSS_NUM_H_
+#define _MSS_NUM_H_
+
+namespace mss
+{
+
+///
+/// @brief Return whether or not a number is odd
+/// @param[in] i_number the number to check
+/// @return true if i_number is odd
+///
+template< typename T >
+constexpr bool is_odd(const T i_number)
+{
+    return (i_number & 0x1);
+}
+
+
+}
+#endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/mss.H b/src/import/chips/p9/procedures/hwp/memory/mss.H
index 619d71c10..d85840698 100644
--- a/src/import/chips/p9/procedures/hwp/memory/mss.H
+++ b/src/import/chips/p9/procedures/hwp/memory/mss.H
@@ -47,6 +47,7 @@
 
 #include <lib/utils/index.H>
 #include <lib/utils/c_str.H>
+#include <lib/utils/num.H>
 
 #include <lib/utils/pos.H>
 #include <lib/utils/swizzle.H>