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authorPrasad Bg Ranganath <prasadbgr@in.ibm.com>2017-07-12 07:56:26 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-08-04 10:46:41 -0400
commit67a012a80cf06ea7a53d6d58156d9c9c0e724707 (patch)
treed318c00b64caa40bd80607260c023f5d9dbd50fe /src/import/chips/p9/procedures/hwp
parentfbd778df77648843f831e1b9bacae3e4a9fbf35b (diff)
downloadtalos-hostboot-67a012a80cf06ea7a53d6d58156d9c9c0e724707.tar.gz
talos-hostboot-67a012a80cf06ea7a53d6d58156d9c9c0e724707.zip
Bug fixes in Fir mask updates
- Updated PBA Fir bits as well - Updated review comments Change-Id: Ib1a7b155b779149319aa94749ac515c0226ad4fd CQ: SW392559 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43029 Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43032 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C44
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H97
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_firinit.C166
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_firinit.C156
4 files changed, 275 insertions, 188 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C
index 92d5d864c..7a3f1f2a0 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C
@@ -171,38 +171,38 @@ fapi2::ReturnCode pm_cme_fir_init(
"ERROR: Failed to clear CME FIR");
/* Set the action and mask for the CME LFIR bits */
- FAPI_TRY(l_cmeFir.mask(PPE_INT_ERR), "ERROR: Failed to mask");
- FAPI_TRY(l_cmeFir.mask(PPE_EXT_ERR), "ERROR: Failed to mask");
- FAPI_TRY(l_cmeFir.mask(PPE_PROG_ERR), "ERROR: Failed to mask");
- FAPI_TRY(l_cmeFir.mask(PPE_BRKPT_ERR), "ERROR: Failed to mask");
- FAPI_TRY(l_cmeFir.mask(PPE_WATCHDOG), "ERROR: Failed to mask");
- FAPI_TRY(l_cmeFir.mask(PPE_HALT), "ERROR: Failed to mask");
- FAPI_TRY(l_cmeFir.mask(PPE_DBGTRG), "ERROR: Failed to mask");
+ FAPI_TRY(l_cmeFir.mask(PPE_INT_ERR), FIR_MASK_ERROR);
+ FAPI_TRY(l_cmeFir.mask(PPE_EXT_ERR), FIR_MASK_ERROR);
+ FAPI_TRY(l_cmeFir.mask(PPE_PROG_ERR), FIR_MASK_ERROR);
+ FAPI_TRY(l_cmeFir.mask(PPE_BRKPT_ERR), FIR_MASK_ERROR);
+ FAPI_TRY(l_cmeFir.mask(PPE_WATCHDOG), FIR_MASK_ERROR);
+ FAPI_TRY(l_cmeFir.mask(PPE_HALT), FIR_MASK_ERROR);
+ FAPI_TRY(l_cmeFir.mask(PPE_DBGTRG), FIR_MASK_ERROR);
FAPI_TRY(l_cmeFir.setRecvAttn(CME_SRAM_UE),
- "ERROR: Failed to set recovery on interrupt");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_cmeFir.setRecvAttn(CME_SRAM_CE),
- "ERROR: Failed to set recoverable error");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_cmeFir.setRecvAttn(SRAM_SCRUB_ERR),
- "ERROR: Failed to set recoverable error");
- FAPI_TRY(l_cmeFir.mask(BCE_ERR), "ERROR: Failed to mask");
- FAPI_TRY(l_cmeFir.mask(CME_SPARE_11), "ERROR: Failed to mask");
- FAPI_TRY(l_cmeFir.mask(CME_SPARE_12), "ERROR: Failed to mask");
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_cmeFir.mask(BCE_ERR), FIR_MASK_ERROR);
+ FAPI_TRY(l_cmeFir.mask(CME_SPARE_11), FIR_MASK_ERROR);
+ FAPI_TRY(l_cmeFir.mask(CME_SPARE_12), FIR_MASK_ERROR);
FAPI_TRY(l_cmeFir.setRecvAttn(C0_iVRM_DPOUT),
- "ERROR: Failed to set recoverable error");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_cmeFir.setRecvAttn(C1_iVRM_DPOUT),
- "ERROR: Failed to set recoverable error");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_cmeFir.setRecvAttn(CACHE_iVRM_DPOUT),
- "ERROR: Failed to set recoverable error");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_cmeFir.setRecvAttn(EXTRM_DROOP_ERR),
- "ERROR: Failed to set recoverable error");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_cmeFir.setRecvAttn(LARGE_DROOP_ERR),
- "ERROR: Failed to set recoverable error");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_cmeFir.setRecvAttn(SMALL_DROOP_ERR),
- "ERROR: Failed to set recoverable error");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_cmeFir.setRecvAttn(UNEXP_DROOP_ENCODE),
- "ERROR: Failed to set recoverable error");
- FAPI_TRY(l_cmeFir.mask(CME_FIR_PAR_ERR_DUP), "ERROR: Failed to mask");
- FAPI_TRY(l_cmeFir.mask(CME_FIR_PAR_ERR), "ERROR: Failed to mask");
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_cmeFir.mask(CME_FIR_PAR_ERR_DUP), FIR_MASK_ERROR);
+ FAPI_TRY(l_cmeFir.mask(CME_FIR_PAR_ERR), FIR_MASK_ERROR);
//todo: Yet to confirm on the action for the following bits
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H
index b4383677b..4a0423778 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -45,6 +45,13 @@
#include <p9_quad_scom_addresses.H>
#include <p9_misc_scom_addresses.H>
+
+#define FIR_CHECKSTOP_ERROR "ERROR: Failed to set CheckStop action"
+#define FIR_MASK_ERROR "ERROR: Failed to set mask action"
+#define FIR_UNMASK_ERROR "ERROR: Failed to set unmask action"
+#define FIR_REC_ATTN_ERROR "ERROR: Failed to set recoverable attn action"
+#define FIR_REC_INTR_ERROR "ERROR: Failed to set recoverable interrupt action"
+#define FIR_MALF_ALRT_ERROR "ERROR: Failed to set malfunction alert action"
namespace p9pmFIR
{
@@ -123,6 +130,8 @@ class PMFir
fapi2::buffer<uint64_t> iv_action0;
fapi2::buffer<uint64_t> iv_action1;
fapi2::buffer<uint64_t> iv_mask;
+ fapi2::buffer<uint64_t> iv_and_mask;
+ fapi2::buffer<uint64_t> iv_or_mask;
// Addresses of the FIRs, Masks, and action registers
uint64_t iv_fir_address;
@@ -135,6 +144,8 @@ class PMFir
bool iv_action0_write;
bool iv_action1_write;
bool iv_mask_write;
+ bool iv_mask_and_write;
+ bool iv_mask_or_write;
uint8_t iv_targetType;
@@ -202,6 +213,8 @@ PMFir<FIRTYPE_OCC_LFIR>::PMFir(
iv_action0_write = false;
iv_action1_write = false;
iv_mask_write = false;
+ iv_mask_and_write = false;
+ iv_mask_or_write = false;
}
/// @brief The constructor for FIR class for PBA FIR
@@ -223,6 +236,8 @@ PMFir<FIRTYPE_PBA_LFIR>::PMFir(
iv_action0_write = false;
iv_action1_write = false;
iv_mask_write = false;
+ iv_mask_and_write = false;
+ iv_mask_or_write = false;
}
/// @brief Base constructor for FIR class to build object based on FIR type
@@ -262,6 +277,8 @@ PMFir<FIRTYPE_CME_LFIR>::PMFir(
iv_action0_write = false;
iv_action1_write = false;
iv_mask_write = false;
+ iv_mask_and_write = false;
+ iv_mask_or_write = false;
}
/// @brief Base constructor for FIR class to build object based on FIR type
@@ -298,6 +315,8 @@ PMFir<FIRTYPE_PPM_LFIR>::PMFir(
iv_action0_write = false;
iv_action1_write = false;
iv_mask_write = false;
+ iv_mask_and_write = false;
+ iv_mask_or_write = false;
}
/// @brief Base constructor for FIR class to build object based on FIR type
@@ -334,6 +353,8 @@ PMFir<FIRTYPE_PPM_LFIR>::PMFir(
iv_action0_write = false;
iv_action1_write = false;
iv_mask_write = false;
+ iv_mask_and_write = false;
+ iv_mask_or_write = false;
}
/// @brief Get the values of FIRs, FIR masks & FIR actions
@@ -366,7 +387,11 @@ fapi2::ReturnCode PMFir<Ftype>::get(const regType i_reg)
if(i_reg == REG_FIRMASK || i_reg == REG_ALL)
{
FAPI_TRY(fapi2::getScom(iv_proc, iv_mask_address, iv_mask));
+ iv_and_mask = iv_mask;
+ iv_or_mask = iv_mask;
iv_mask_write = false;
+ iv_mask_and_write = false;
+ iv_mask_or_write = false;
}
}
@@ -393,7 +418,11 @@ fapi2::ReturnCode PMFir<Ftype>::get(const regType i_reg)
if(i_reg == REG_FIRMASK || i_reg == REG_ALL)
{
FAPI_TRY(fapi2::getScom(iv_ex, iv_mask_address, iv_mask));
+ iv_and_mask = iv_mask;
+ iv_or_mask = iv_mask;
iv_mask_write = false;
+ iv_mask_and_write = false;
+ iv_mask_or_write = false;
}
}
@@ -402,7 +431,11 @@ fapi2::ReturnCode PMFir<Ftype>::get(const regType i_reg)
if (i_reg == REG_ERRMASK)
{
FAPI_TRY(fapi2::getScom(iv_eq, iv_mask_address, iv_mask));
+ iv_and_mask = iv_mask;
+ iv_or_mask = iv_mask;
iv_mask_write = false;
+ iv_mask_and_write = false;
+ iv_mask_or_write = false;
}
}
@@ -411,7 +444,11 @@ fapi2::ReturnCode PMFir<Ftype>::get(const regType i_reg)
if (i_reg == REG_ERRMASK)
{
FAPI_TRY(fapi2::getScom(iv_core, iv_mask_address, iv_mask));
+ iv_and_mask = iv_mask;
+ iv_or_mask = iv_mask;
iv_mask_write = false;
+ iv_mask_and_write = false;
+ iv_mask_or_write = false;
}
}
@@ -447,10 +484,16 @@ fapi2::ReturnCode PMFir<Ftype>::put()
FAPI_TRY(putScom(iv_proc, iv_action1_address, iv_action1));
}
- if (iv_mask_write == true)
+ if (iv_mask_or_write == true)
{
l_address = iv_fir_address + MASK_WOR_INCR;
- FAPI_TRY(putScom(iv_proc, l_address, iv_mask));
+ FAPI_TRY(putScom(iv_proc, l_address, iv_or_mask));
+ }
+
+ if (iv_mask_and_write == true)
+ {
+ l_address = iv_fir_address + MASK_WAND_INCR;
+ FAPI_TRY(putScom(iv_proc, l_address, iv_and_mask));
}
}
@@ -472,10 +515,16 @@ fapi2::ReturnCode PMFir<Ftype>::put()
FAPI_TRY(putScom(iv_ex, iv_action1_address, iv_action1));
}
- if (iv_mask_write == true)
+ if (iv_mask_or_write == true)
{
l_address = iv_fir_address + MASK_WOR_INCR;
- FAPI_TRY(putScom(iv_ex, l_address, iv_mask));
+ FAPI_TRY(putScom(iv_ex, l_address, iv_or_mask));
+ }
+
+ if (iv_mask_and_write == true)
+ {
+ l_address = iv_fir_address + MASK_WAND_INCR;
+ FAPI_TRY(putScom(iv_ex, l_address, iv_and_mask));
}
}
@@ -510,10 +559,12 @@ fapi2::ReturnCode PMFir<Ftype>::setCheckStop(const uint32_t i_bit)
{
FAPI_TRY(iv_action0.clearBit(i_bit));
FAPI_TRY(iv_action1.clearBit(i_bit));
+ FAPI_TRY(iv_and_mask.clearBit(i_bit));
FAPI_TRY(iv_mask.clearBit(i_bit));
iv_action0_write = true;
iv_action1_write = true;
iv_mask_write = true;
+ iv_mask_and_write = true;
fapi_try_exit:
return fapi2::current_err;
@@ -530,10 +581,12 @@ fapi2::ReturnCode PMFir<Ftype>::setRecvAttn(const uint32_t i_bit)
{
FAPI_TRY(iv_action0.clearBit(i_bit));
FAPI_TRY(iv_action1.setBit(i_bit));
+ FAPI_TRY(iv_and_mask.clearBit(i_bit));
FAPI_TRY(iv_mask.clearBit(i_bit));
iv_action0_write = true;
iv_action1_write = true;
iv_mask_write = true;
+ iv_mask_and_write = true;
fapi_try_exit:
return fapi2::current_err;
@@ -550,10 +603,12 @@ fapi2::ReturnCode PMFir<Ftype>::setRecvIntr(const uint32_t i_bit)
{
FAPI_TRY(iv_action0.setBit(i_bit));
FAPI_TRY(iv_action1.clearBit(i_bit));
+ FAPI_TRY(iv_and_mask.clearBit(i_bit));
FAPI_TRY(iv_mask.clearBit(i_bit));
iv_action0_write = true;
iv_action1_write = true;
iv_mask_write = true;
+ iv_mask_and_write = true;
fapi_try_exit:
return fapi2::current_err;
@@ -570,10 +625,12 @@ fapi2::ReturnCode PMFir<Ftype>::setMalfAlert(const uint32_t i_bit)
{
FAPI_TRY(iv_action0.setBit(i_bit));
FAPI_TRY(iv_action1.setBit(i_bit));
+ FAPI_TRY(iv_and_mask.clearBit(i_bit));
FAPI_TRY(iv_mask.clearBit(i_bit));
iv_action0_write = true;
iv_action1_write = true;
iv_mask_write = true;
+ iv_mask_and_write = true;
fapi_try_exit:
return fapi2::current_err;
@@ -588,8 +645,10 @@ fapi_try_exit:
template <FIRType Ftype>
fapi2::ReturnCode PMFir<Ftype>::mask(const uint32_t i_bit)
{
+ FAPI_TRY(iv_or_mask.setBit(i_bit));
FAPI_TRY(iv_mask.setBit(i_bit));
iv_mask_write = true;
+ iv_mask_or_write = true;
fapi_try_exit:
return fapi2::current_err;
@@ -604,8 +663,10 @@ fapi_try_exit:
template <FIRType Ftype>
fapi2::ReturnCode PMFir<Ftype>::unmask(const uint32_t i_bit)
{
+ FAPI_TRY(iv_and_mask.clearBit(i_bit));
FAPI_TRY(iv_mask.clearBit(i_bit));
iv_mask_write = true;
+ iv_mask_and_write = true;
fapi_try_exit:
return fapi2::current_err;
@@ -639,7 +700,11 @@ fapi2::ReturnCode PMFir<Ftype>::setAllRegBits(const regType i_reg)
if(i_reg == REG_FIRMASK || i_reg == REG_ERRMASK || i_reg == REG_ALL)
{
iv_mask.flush<1>();
+ iv_or_mask.flush<1>();
+ iv_and_mask.flush<1>();
iv_mask_write = true;
+ iv_mask_and_write = true;
+ iv_mask_or_write = true;
}
return fapi2::current_err;
@@ -673,7 +738,11 @@ fapi2::ReturnCode PMFir<Ftype>::clearAllRegBits(const regType i_reg)
if(i_reg == REG_FIRMASK || i_reg == REG_ERRMASK || i_reg == REG_ALL)
{
iv_mask.flush<0>();
+ iv_or_mask.flush<0>();
+ iv_and_mask.flush<0>();
iv_mask_write = true;
+ iv_mask_or_write = true;
+ iv_mask_and_write = true;
}
return fapi2::current_err;
@@ -799,7 +868,11 @@ fapi2::ReturnCode PMFir<FIRTYPE_OCC_LFIR>::restoreSavedMask()
iv_mask.extract<0, 32>(l_tempMask);
l_mask |= l_tempMask;
iv_mask.insertFromRight<0, 32>(l_mask);
+ iv_or_mask = iv_mask;
+ iv_and_mask = iv_mask;
iv_mask_write = true;
+ iv_mask_and_write = true;
+ iv_mask_or_write = true;
fapi_try_exit:
return fapi2::current_err;
@@ -822,7 +895,11 @@ fapi2::ReturnCode PMFir<FIRTYPE_PBA_LFIR>::restoreSavedMask()
iv_mask.extract<0, 32>(l_tempMask);
l_mask |= l_tempMask;
iv_mask.insertFromRight<0, 32>(l_mask);
+ iv_or_mask = iv_mask;
+ iv_and_mask = iv_mask;
iv_mask_write = true;
+ iv_mask_and_write = true;
+ iv_mask_or_write = true;
fapi_try_exit:
return fapi2::current_err;
@@ -845,7 +922,11 @@ fapi2::ReturnCode PMFir<FIRTYPE_CME_LFIR>::restoreSavedMask()
iv_mask.extract<0, 32>(l_tempMask);
l_mask |= l_tempMask;
iv_mask.insertFromRight<0, 32>(l_mask);
+ iv_or_mask = iv_mask;
+ iv_and_mask = iv_mask;
iv_mask_write = true;
+ iv_mask_and_write = true;
+ iv_mask_or_write = true;
fapi_try_exit:
return fapi2::current_err;
@@ -877,7 +958,13 @@ fapi2::ReturnCode PMFir<FIRTYPE_PPM_LFIR>::restoreSavedMask()
iv_mask.extract<0, 32>(l_tempMask);
l_mask |= l_tempMask;
iv_mask.insertFromRight<0, 32>(l_mask);
+ iv_or_mask = iv_mask;
+ iv_and_mask = iv_mask;
iv_mask_write = true;
+ iv_mask_and_write = true;
+ iv_mask_or_write = true;
+
+
fapi_try_exit:
return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_firinit.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_firinit.C
index c4a6acd9a..e30adad51 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_firinit.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_firinit.C
@@ -75,14 +75,14 @@ enum OCC_FIR_BITS
GPE2_ERR, // 11
GPE3_ERR, // 12
OCB_ERR, // 13
- SRT_UE, // 14
- SRT_CE, // 15
- SRT_READ_ERR, // 16
- SRT_WRITE_ERR, // 17
- SRT_DATAOUT_PERR, // 18
- SRT_OCI_WDATA_PARITY, // 19
- SRT_OCI_BE_PARITY_ERR, // 20
- SRT_OCI_ADDR_PARITY_ERR, // 21
+ SRAM_UE, // 14
+ SRAM_CE, // 15
+ SRAM_READ_ERR, // 16
+ SRAM_WRITE_ERR, // 17
+ SRAM_DATAOUT_PERR, // 18
+ SRAM_OCI_WDATA_PARITY, // 19
+ SRAM_OCI_BE_PARITY_ERR, // 20
+ SRAM_OCI_ADDR_PARITY_ERR, // 21
GPE0_HALTED, // 22
GPE1_HALTED, // 23
GPE2_HALTED, // 24
@@ -247,133 +247,133 @@ fapi2::ReturnCode pm_occ_fir_init(
/* Set the action and mask for the OCC LFIR bits */
FAPI_TRY(l_occFir.mask(OCC_FW0),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(OCC_FW1),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(CME_ERR_NOTIFY),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(STOP_RCV_NOTIFY_PRD),
- "ERROR: Failed to set recoverable attention");
- FAPI_TRY(l_occFir.setMalfAlert(OCC_HB_NOTIFY),
- "ERROR: Failed to set Malf alert");
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_occFir.mask(OCC_HB_NOTIFY),
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(GPE0_WD_TIMEOUT),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(GPE1_WD_TIMEOUT),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(GPE2_WD_TIMEOUT),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(GPE3_WD_TIMEOUT),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_occFir.mask(GPE0_ERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_occFir.mask(GPE1_ERR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
+ FAPI_TRY(l_occFir.setRecvAttn(GPE0_ERR),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_occFir.setRecvAttn(GPE1_ERR),
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.mask(GPE2_ERR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(GPE3_ERR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(OCB_ERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_occFir.setRecvAttn(SRT_UE),
- "ERROR: Failed to set recoverable attention");
- FAPI_TRY(l_occFir.setRecvAttn(SRT_CE),
- "ERROR: Failed to set recoverable attention");
- FAPI_TRY(l_occFir.setRecvAttn(SRT_READ_ERR),
- "ERROR: Failed to set recoverable attention");
- FAPI_TRY(l_occFir.setRecvAttn(SRT_WRITE_ERR),
- "ERROR: Failed to set recoverable attention");
- FAPI_TRY(l_occFir.setRecvAttn(SRT_DATAOUT_PERR),
- "ERROR: Failed to set recoverable attention");
- FAPI_TRY(l_occFir.setRecvAttn(SRT_OCI_WDATA_PARITY),
- "ERROR: Failed to set recoverable attention");
- FAPI_TRY(l_occFir.setRecvAttn(SRT_OCI_BE_PARITY_ERR),
- "ERROR: Failed to set recoverable attention");
- FAPI_TRY(l_occFir.setRecvAttn(SRT_OCI_ADDR_PARITY_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_MASK_ERROR);
+ FAPI_TRY(l_occFir.setRecvAttn(SRAM_UE),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_occFir.setRecvAttn(SRAM_CE),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_occFir.setRecvAttn(SRAM_READ_ERR),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_occFir.setRecvAttn(SRAM_WRITE_ERR),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_occFir.setRecvAttn(SRAM_DATAOUT_PERR),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_occFir.setRecvAttn(SRAM_OCI_WDATA_PARITY),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_occFir.setRecvAttn(SRAM_OCI_BE_PARITY_ERR),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_occFir.setRecvAttn(SRAM_OCI_ADDR_PARITY_ERR),
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.mask(GPE0_HALTED),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(GPE1_HALTED),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(GPE2_HALTED),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(GPE3_HALTED),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(EXT_TRAP),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(PPC405_CORE_RESET),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(PPC405_CHIP_RESET),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(PPC405_SYS_RESET),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(PPC405_WAIT_STATE),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(PPC405_DBGSTOPACK),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCB_DB_OCI_TIMEOUT),
- "ERROR: Failed to set recoverable atention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCB_DB_OCI_RDATA_PARITY),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCB_DB_OCI_SLVERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCB_PIB_ADDR_PARITY_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCB_DB_PIB_DATA_PARITY_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCB_IDC0_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCB_IDC1_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCB_IDC2_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCB_IDC3_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(SRT_FSM_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(JTAGACC_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.mask(SPARE_ERR_38),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(C405_ECC_UE),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(C405_ECC_CE),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(C405_OCI_MC_CHK),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(SRAM_SPARE_DIRERR0),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(SRAM_SPARE_DIRERR1),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(SRAM_SPARE_DIRERR2),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(SRAM_SPARE_DIRERR3),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(GPE0_OCISLV_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(GPE1_OCISLV_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(GPE2_OCISLV_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(GPE3_OCISLV_ERR),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(C405ICU_M_TIMEOUT),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(C405DCU_M_TIMEOUT),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCC_CMPLX_FAULT),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.setRecvAttn(OCC_CMPLX_NOTIFY),
- "ERROR: Failed to set recoverable attention");
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_occFir.mask(SPARE_59),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(SPARE_60),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(SPARE_61),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(FIR_PARITY_ERR_DUP),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_occFir.mask(FIR_PARITY_ERR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
if (firinit_done_flag)
{
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_firinit.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_firinit.C
index b01e33b0a..3b4ae530f 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_firinit.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_firinit.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -68,7 +68,7 @@ enum PBA_FIR_BITS
PBAFIR_PB_CE_FW, // 5
PBAFIR_OCI_SLAVE_INIT, // 6
PBAFIR_OCI_WRPAR_ERR, // 7
- PBAFIR_OCI_REREQTO, // 8
+ PBAFIR_SPARE, // 8
PBAFIR_PB_UNEXPCRESP, // 9
PBAFIR_PB_UNEXPDATA, // 10
PBAFIR_PB_PARITY_ERR, // 11
@@ -201,98 +201,98 @@ fapi2::ReturnCode pm_pba_fir_init(
"ERROR: Failed to clear PBA FIR");
/* Set the action and mask for the PBA LFIR bits */
- FAPI_TRY(l_pbaFir.mask(PBAFIR_OCI_APAR_ERR),
- "ERROR: Failed to mask bit");
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_OCI_APAR_ERR),
+ FIR_CHECKSTOP_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_RDADRERR_FW),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_RDDATATO_FW),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_SUE_FW),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_UE_FW),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_CE_FW),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_OCI_SLAVE_INIT),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_OCI_WRPAR_ERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_OCI_REREQTO),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_UNEXPCRESP),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_UNEXPDATA),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_PARITY_ERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_WRADRERR_FW),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_BADCRESP),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
+ FAPI_TRY(l_pbaFir.setRecvAttn(PBAFIR_PB_UE_FW),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_pbaFir.setRecvAttn(PBAFIR_PB_CE_FW),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_OCI_SLAVE_INIT),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_OCI_WRPAR_ERR),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.mask(PBAFIR_SPARE),
+ FIR_MASK_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_PB_UNEXPCRESP),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_PB_UNEXPDATA),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_PB_PARITY_ERR),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_PB_WRADRERR_FW),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_PB_BADCRESP),
+ FIR_CHECKSTOP_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_ACKDEAD_FW_RD),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_CRESPTO),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_BCUE_SETUP_ERR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
+ FAPI_TRY(l_pbaFir.setRecvAttn(PBAFIR_PB_CRESPTO),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_BCUE_SETUP_ERR),
+ FIR_CHECKSTOP_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_BCUE_PB_ACK_DEAD),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_BCUE_PB_ADRERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_BCUE_OCI_DATERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_BCDE_SETUP_ERR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_BCUE_PB_ADRERR),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_BCUE_OCI_DATERR),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_BCDE_SETUP_ERR),
+ FIR_CHECKSTOP_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_BCDE_PB_ACK_DEAD),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_BCDE_PB_ADRERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_BCDE_RDDATATO_ERR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_BCDE_PB_ADRERR),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_BCDE_RDDATATO_ERR),
+ FIR_CHECKSTOP_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_BCDE_SUE_ERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_BCDE_UE_ERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_BCDE_CE),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_BCDE_OCI_DATERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_INTERNAL_ERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_ILLEGAL_CACHE_OP),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_OCI_BAD_REG_ADDR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_AXPUSH_WRERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_AXRCV_DLO_ERR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
+ FAPI_TRY(l_pbaFir.setRecvAttn(PBAFIR_BCDE_UE_ERR),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_pbaFir.setRecvAttn(PBAFIR_BCDE_CE),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_BCDE_OCI_DATERR),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_INTERNAL_ERR),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_ILLEGAL_CACHE_OP),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_OCI_BAD_REG_ADDR),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_AXPUSH_WRERR),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_AXRCV_DLO_ERR),
+ FIR_CHECKSTOP_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_AXRCV_DLO_TO),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_AXRCV_RSVDATA_TO),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_AXFLOW_ERR),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_AXSND_DHI_RTYTO),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_AXSND_DLO_RTYTO),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_AXFLOW_ERR),
+ FIR_CHECKSTOP_ERROR);
+ FAPI_TRY(l_pbaFir.setRecvAttn(PBAFIR_AXSND_DHI_RTYTO),
+ FIR_REC_ATTN_ERROR);
+ FAPI_TRY(l_pbaFir.setRecvAttn(PBAFIR_AXSND_DLO_RTYTO),
+ FIR_REC_ATTN_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_AXSND_RSVTO),
- "ERROR: Failed to mask bit");
- FAPI_TRY(l_pbaFir.mask(PBAFIR_AXSND_RSVERR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
+ FAPI_TRY(l_pbaFir.setCheckStop(PBAFIR_AXSND_RSVERR),
+ FIR_CHECKSTOP_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_PB_ACKDEAD_FW_WR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_RESERVED_41),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_RESERVED_42),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_RESERVED_43),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_FIR_PARITY_ERR2),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(l_pbaFir.mask(PBAFIR_FIR_PARITY_ERR),
- "ERROR: Failed to mask bit");
+ FIR_MASK_ERROR);
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PM_FIRINIT_DONE_ONCE_FLAG,
i_target, firinit_done_flag),
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