summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/hwp
diff options
context:
space:
mode:
authorJoe McGill <jmcgill@us.ibm.com>2017-09-30 14:56:01 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-10-05 11:36:30 -0400
commit623b0b5e163829736ccaf5d10659056b18b74e5b (patch)
tree9b54551ebd6fd6821e8cf7ab1c443956238e6eca /src/import/chips/p9/procedures/hwp
parent8870aa8179783ec0952c15a9538dc5f7f584a3d0 (diff)
downloadtalos-hostboot-623b0b5e163829736ccaf5d10659056b18b74e5b.tar.gz
talos-hostboot-623b0b5e163829736ccaf5d10659056b18b74e5b.zip
update HWP level metadata for nest, common files
Change-Id: I451695b8ae1d8f7d5ed6d512631992dea98b5ee8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46967 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46970 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H4
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_nest_common_mc_def.H4
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C5
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9c_set_inband_addr.C36
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9c_set_inband_addr.H14
8 files changed, 36 insertions, 33 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C
index 9e9802b33..361a1cf83 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C
@@ -32,7 +32,7 @@
// *HWP HW Owner : Joe McGill <jmcgill@us.ibm.com>
// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
// *HWP Team : Nest
-// *HWP Level : 2
+// *HWP Level : 3
// *HWP Consumed by : HB
//
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.H b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.H
index 8b15e4f5b..352f4c300 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.H
@@ -32,7 +32,7 @@
// *HWP HW Owner : Joe McGill <jmcgill@us.ibm.com>
// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
// *HWP Team : Nest
-// *HWP Level : 2
+// *HWP Level : 3
// *HWP Consumed by : HB
//
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.H b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.H
index 50cea5a9c..54fb70666 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.H
@@ -32,7 +32,7 @@
// *HWP HW Owner : Joe McGill <jmcgill@us.ibm.com>
// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
// *HWP Team : Nest
-// *HWP Level : 2
+// *HWP Level : 3
// *HWP Consumed by : HB
//
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H
index 0a6015ad0..a60186f07 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -33,7 +33,7 @@
/// *HWP HWP Owner : Joe McGill <jmcgill@us.ibm.com>
/// *HWP FW Owner : Thi Tran <thi@us.ibm.com>
/// *HWP Team : Nest
-/// *HWP Level : 1
+/// *HWP Level : 3
/// *HWP Consumed by : HB
/// ----------------------------------------------------------------------------
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_nest_common_mc_def.H b/src/import/chips/p9/procedures/hwp/nest/p9_nest_common_mc_def.H
index 28d152507..6cdbaf4c7 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_nest_common_mc_def.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_nest_common_mc_def.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016 */
+/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -31,7 +31,7 @@
/// *HWP HWP Owner : Joe McGill <jmcgill@us.ibm.com>
/// *HWP FW Owner : Thi Tran <thi@us.ibm.com>
/// *HWP Team : Nest
-/// *HWP Level : 2
+/// *HWP Level : 3
/// *HWP Consumed by : HB
/// ----------------------------------------------------------------------------
#ifndef _P9_NEST_COMMON_MC_DEF_H_
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C
index b3e5c3f92..bfd05abe9 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C
@@ -32,7 +32,7 @@
// *HWP HW Owner : Joe McGill <jmcgill@us.ibm.com>
// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
// *HWP Team : Nest
-// *HWP Level : 2
+// *HWP Level : 3
// *HWP Consumed by : HB
//
@@ -47,7 +47,8 @@
// Function definitions
//------------------------------------------------------------------------------
-fapi2::ReturnCode p9_sys_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+fapi2::ReturnCode p9_sys_chiplet_scominit(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
{
fapi2::ReturnCode l_rc;
fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9c_set_inband_addr.C b/src/import/chips/p9/procedures/hwp/nest/p9c_set_inband_addr.C
index cc83b1834..2e578707c 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9c_set_inband_addr.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9c_set_inband_addr.C
@@ -33,7 +33,7 @@
// *HWP HWP Owner: Yang Fan Liu shliuyf@cn.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: HB
//-----------------------------------------------------------------------------------
@@ -46,14 +46,9 @@
//-----------------------------------------------------------------------------------
// Function definitions
//-----------------------------------------------------------------------------------
-///
-/// @brief configure Cumulus inband address
-///
-/// @param[in] i_target => Processor chip target
-///
-/// @return FAPI_RC_SUCCESS if the setup completes successfully, else error
-//
-fapi2::ReturnCode p9c_set_inband_addr(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+
+fapi2::ReturnCode p9c_set_inband_addr(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
{
uint64_t l_base_addr_nm0, l_base_addr_nm1, l_base_addr_m, l_base_addr_mmio;
@@ -72,7 +67,9 @@ fapi2::ReturnCode p9c_set_inband_addr(const fapi2::Target<fapi2::TARGET_TYPE_PRO
fapi2::ATTR_DMI_INBAND_BAR_ENABLE_Type l_bar_enable;
// retrieve inband BAR enable
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_DMI_INBAND_BAR_ENABLE, l_dmi, l_bar_enable),
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_DMI_INBAND_BAR_ENABLE,
+ l_dmi,
+ l_bar_enable),
"Error from FAPI_ATTR_GET (ATTR_DMI_INBAND_BAR_ENABLE)");
if (l_bar_enable == fapi2::ENUM_ATTR_DMI_INBAND_BAR_ENABLE_ENABLE)
@@ -83,7 +80,9 @@ fapi2::ReturnCode p9c_set_inband_addr(const fapi2::Target<fapi2::TARGET_TYPE_PRO
uint8_t l_dmi_pos;
// retrieve inband BAR offset
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_DMI_INBAND_BAR_BASE_ADDR_OFFSET, l_dmi, l_bar_offset),
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_DMI_INBAND_BAR_BASE_ADDR_OFFSET,
+ l_dmi,
+ l_bar_offset),
"Error from FAPI_ATTR_GET (ATTR_DMI_INBAND_BAR_BASE_ADDR_OFFSET)");
// form SCOM register format
@@ -95,22 +94,27 @@ fapi2::ReturnCode p9c_set_inband_addr(const fapi2::Target<fapi2::TARGET_TYPE_PRO
l_scom_data.setBit<0>();
// get MI target to configure MCFGPR
- fapi2::Target<fapi2::TARGET_TYPE_MI> l_mi = l_dmi.getParent<fapi2::TARGET_TYPE_MI>();
+ fapi2::Target<fapi2::TARGET_TYPE_MI> l_mi =
+ l_dmi.getParent<fapi2::TARGET_TYPE_MI>();
// retrieve DMI pos
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_dmi, l_dmi_pos),
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS,
+ l_dmi,
+ l_dmi_pos),
"Error from FAPI_ATTR_GET (ATTR_CHIP_UNIT_POS)");
// configure inband channel 0 MCFGPR0
if(l_dmi_pos % 2 == 0)
{
FAPI_TRY(fapi2::putScom(l_mi, MCS_MCRSVDE, l_scom_data),
- "Error from putScom MCFGPR0 for DMI id: %d", l_dmi_pos);
+ "Error from putScom MCFGPR0 for DMI id: %d",
+ l_dmi_pos);
}
// configure inband channel 1 MCFGPR1
else
{
FAPI_TRY(fapi2::putScom(l_mi, MCS_MCRSVDF, l_scom_data),
- "Error from putScom MCFGPR1 for DMI id: %d", l_dmi_pos);
+ "Error from putScom MCFGPR1 for DMI id: %d",
+ l_dmi_pos);
}
}
}
@@ -156,5 +160,3 @@ fapi_try_exit:
FAPI_DBG("End");
return fapi2::current_err;
}
-
-
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9c_set_inband_addr.H b/src/import/chips/p9/procedures/hwp/nest/p9c_set_inband_addr.H
index 93dc96ec6..2066a5ba2 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9c_set_inband_addr.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9c_set_inband_addr.H
@@ -33,7 +33,7 @@
// *HWP HWP Owner: Yang Fan Liu shliuyf@cn.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: HB
#ifndef _P9C_SET_INBAND_ADDR_H_
@@ -45,21 +45,20 @@
//-----------------------------------------------------------------------------------
#include <fapi2.H>
-
//-----------------------------------------------------------------------------------
// Structure definitions
//-----------------------------------------------------------------------------------
// function pointer typedef definition for HWP call support
-typedef fapi2::ReturnCode (*p9c_set_inband_addr_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
-
-
-extern "C" {
+typedef fapi2::ReturnCode (*p9c_set_inband_addr_FP_t) (
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
//-----------------------------------------------------------------------------------
// Function prototype
//-----------------------------------------------------------------------------------
+extern "C" {
+
///
/// @brief configure Cumulus inband address
///
@@ -67,7 +66,8 @@ extern "C" {
///
/// @return FAPI_RC_SUCCESS if the setup completes successfully, else error
//
- fapi2::ReturnCode p9c_set_inband_addr(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+ fapi2::ReturnCode p9c_set_inband_addr(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
} //extern"C"
OpenPOWER on IntegriCloud