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authordchowe <dchowe@us.ibm.com>2017-07-31 10:28:47 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-08-14 00:23:55 -0400
commit32171ba89a92ca3aa4b753ae2d190a4759af9e7b (patch)
tree4546fa04901fafad2bde52e4c6c98d2a9b0b4227 /src/import/chips/p9/procedures/hwp
parentdea417f070afd93b5fc8e0a00b39660512a0678a (diff)
downloadtalos-hostboot-32171ba89a92ca3aa4b753ae2d190a4759af9e7b.tar.gz
talos-hostboot-32171ba89a92ca3aa4b753ae2d190a4759af9e7b.zip
DLL RAS Fir settings update
Change-Id: I5ec9527f0ac44597a17e637b15020742243bdd05 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44220 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com> Reviewed-by: John G. Rell III <jgrell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44224 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_dl_scom.C28
-rw-r--r--src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C20
2 files changed, 32 insertions, 16 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_dl_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_dl_scom.C
index 46d08763e..a60e1d4b7 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_dl_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_dl_scom.C
@@ -30,10 +30,10 @@
using namespace fapi2;
constexpr uint64_t literal_0x0B = 0x0B;
-constexpr uint64_t literal_0x0 = 0x0;
-constexpr uint64_t literal_0xE00 = 0xE00;
-constexpr uint64_t literal_0x0000 = 0x0000;
-constexpr uint64_t literal_0b11 = 0b11;
+constexpr uint64_t literal_0xF = 0xF;
+constexpr uint64_t literal_0b111 = 0b111;
+constexpr uint64_t literal_0x6 = 0x6;
+constexpr uint64_t literal_0x7 = 0x7;
fapi2::ReturnCode p9_fbc_ioe_dl_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& TGT0,
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& TGT1)
@@ -62,7 +62,7 @@ fapi2::ReturnCode p9_fbc_ioe_dl_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS
l_scom_buffer.insert<11, 5, 59, uint64_t>(literal_0x0B );
}
- l_scom_buffer.insert<28, 4, 60, uint64_t>(literal_0x0 );
+ l_scom_buffer.insert<28, 4, 60, uint64_t>(literal_0xF );
constexpr auto l_PB_IOE_LL1_CONFIG_SL_UE_CRC_ERR_ON = 0x1;
l_scom_buffer.insert<4, 1, 63, uint64_t>(l_PB_IOE_LL1_CONFIG_SL_UE_CRC_ERR_ON );
FAPI_TRY(fapi2::putScom(TGT0, 0x601180aull, l_scom_buffer));
@@ -70,11 +70,9 @@ fapi2::ReturnCode p9_fbc_ioe_dl_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS
{
FAPI_TRY(fapi2::getScom( TGT0, 0x6011818ull, l_scom_buffer ));
- l_scom_buffer.insert<8, 3, 61, uint64_t>(literal_0xE00 );
- l_scom_buffer.insert<32, 16, 48, uint64_t>(literal_0x0000 );
- l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0000 );
- l_scom_buffer.insert<4, 4, 60, uint64_t>(literal_0x0 );
- l_scom_buffer.insert<0, 4, 60, uint64_t>(literal_0x0 );
+ l_scom_buffer.insert<8, 3, 61, uint64_t>(literal_0b111 );
+ l_scom_buffer.insert<4, 4, 60, uint64_t>(literal_0xF );
+ l_scom_buffer.insert<0, 4, 60, uint64_t>(literal_0x6 );
FAPI_TRY(fapi2::putScom(TGT0, 0x6011818ull, l_scom_buffer));
}
{
@@ -82,18 +80,16 @@ fapi2::ReturnCode p9_fbc_ioe_dl_scom(const fapi2::Target<fapi2::TARGET_TYPE_XBUS
if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) )
{
- l_scom_buffer.insert<8, 2, 62, uint64_t>(literal_0b11 );
+ l_scom_buffer.insert<8, 2, 62, uint64_t>(literal_0b111 );
}
else if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21))
|| ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) )
{
- l_scom_buffer.insert<8, 3, 61, uint64_t>(literal_0b11 );
+ l_scom_buffer.insert<8, 3, 61, uint64_t>(literal_0b111 );
}
- l_scom_buffer.insert<32, 16, 48, uint64_t>(literal_0x0000 );
- l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0000 );
- l_scom_buffer.insert<4, 4, 60, uint64_t>(literal_0x0 );
- l_scom_buffer.insert<0, 4, 60, uint64_t>(literal_0x0 );
+ l_scom_buffer.insert<4, 4, 60, uint64_t>(literal_0xF );
+ l_scom_buffer.insert<0, 4, 60, uint64_t>(literal_0x7 );
FAPI_TRY(fapi2::putScom(TGT0, 0x6011819ull, l_scom_buffer));
}
diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C
index 771e87b33..dff5af3dc 100644
--- a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C
@@ -54,6 +54,7 @@
#include <p9_io_xbus_scominit.H>
#include <p9_xbus_g0_scom.H>
#include <p9_xbus_g1_scom.H>
+#include <p9_xbus_scom_addresses.H>
enum
{
@@ -64,6 +65,9 @@ enum
//------------------------------------------------------------------------------
// Constant definitions
//------------------------------------------------------------------------------
+const uint64_t FIR_ACTION0 = 0x0000000000000000ULL;
+const uint64_t FIR_ACTION1 = 0xFFFFFFFFFFFF0000ULL;
+const uint64_t FIR_MASK = 0xDF9797FFFFFFC000ULL;
//------------------------------------------------------------------------------
// Function definitions
@@ -215,6 +219,22 @@ fapi2::ReturnCode p9_io_xbus_scominit(
break;
}
+ // configure FIR
+ {
+ FAPI_TRY(fapi2::putScom(i_target,
+ XBUS_FIR_ACTION0_REG,
+ FIR_ACTION0),
+ "Error from putScom (XBUS_FIR_ACTION0_REG)");
+ FAPI_TRY(fapi2::putScom(i_target,
+ XBUS_FIR_ACTION1_REG,
+ FIR_ACTION1),
+ "Error from putScom (XBUS_FIR_ACTION1_REG)");
+ FAPI_TRY(fapi2::putScom(i_target,
+ XBUS_FIR_MASK_REG,
+ FIR_MASK),
+ "Error from putScom (XBUS_FIR_MASK_REG)");
+ }
+
// mark HWP exit
FAPI_INF("p9_io_xbus_scominit: ...Exiting");
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