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authorAndre Marin <aamarin@us.ibm.com>2017-10-02 12:44:04 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-10-05 12:07:55 -0400
commit1ee14b58e25299a1bc087fb9ee891ed57b053a0d (patch)
treec08b3fdb8ea3c6d298adca881606803d6623882f /src/import/chips/p9/procedures/hwp
parentb8aedd55248eb2f0ff43062a9049a1124e622d21 (diff)
downloadtalos-hostboot-1ee14b58e25299a1bc087fb9ee891ed57b053a0d.tar.gz
talos-hostboot-1ee14b58e25299a1bc087fb9ee891ed57b053a0d.zip
Updated MSS HWP's level and owner change
Change-Id: Ie464db4f224811ec2048178b7e224e1dea756260 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47005 Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47016 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.H6
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.H7
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.H2
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.H6
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_power_cleanup.C6
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_power_cleanup.H6
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.H7
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.H6
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.H6
16 files changed, 36 insertions, 38 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C
index 0b08a9312..732cfd270 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C
@@ -27,7 +27,7 @@
/// @file p9_mss_ddr_phy_reset.C
/// @brief Reset the DDR PHY
///
-// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
// *HWP Level: 3
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.H
index c5e3c17ce..edda1984d 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -27,10 +27,10 @@
/// @file p9_mss_ddr_phy_reset.H
/// @brief Reset and initialize the DDR PHY
///
-// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#ifndef P9_MSS_DDR_PHY_RESET_H_
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.H
index 0822da50c..4d807c46f 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -28,9 +28,9 @@
/// @brief Perform thermal calculations as part of the effective configuration
///
// *HWP HWP Owner: Jacob Harvey <jlharvey@us.ibm.com>
-// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#ifndef __P9_MSS_EFF_CONFIG_THERMAL__
@@ -54,4 +54,3 @@ extern "C"
}
#endif
-
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H
index 2833d5240..d259105a2 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H
@@ -28,7 +28,7 @@
/// @brief Calculate and save off DIMM frequencies
///
// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com>
-// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com>
// *HWP Team: Memory
// *HWP Level: 3
// *HWP Consumed by: FSP:HB
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.C
index dc10018dd..ca7b90fd6 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.C
@@ -28,7 +28,7 @@
/// @brief Sets synchronous mode an
///
// *HWP HWP Owner: Andre A. Marin <aamarin@us.ibm.com>
-// *HWP FW Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP FW Owner: Jacob Harvey <jlharvey@us.ibm.com>
// *HWP Team: Memory
// *HWP Level: 3
// *HWP Consumed by: FSP:HB
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.H
index da847e7ff..7de6effcf 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq_system.H
@@ -28,7 +28,7 @@
/// @brief Sets synchronous mode
///
// *HWP HWP Owner: Andre A. Marin <aamarin@us.ibm.com>
-// *HWP FW Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP FW Owner: Jacob Harvey <jlharvey@us.ibm.com>
// *HWP Team: Memory
// *HWP Level: 3
// *HWP Consumed by: FSP:HB
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C
index 9b0bb9874..fdf0f5533 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C
@@ -27,10 +27,10 @@
/// @file p9_mss_memdiag.C
/// @brief Mainstore pattern testing
///
-// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#include <fapi2.H>
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.H
index 9e86db7a5..b7100ace7 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -26,10 +26,10 @@
/// @file p9_mss_memdiag.H
/// @brief Mainstore pattern testing
///
-// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#ifndef __P9_MSS_MEMDIAG__
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_power_cleanup.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_power_cleanup.C
index 2cd22822e..138cf3480 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_power_cleanup.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_power_cleanup.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -27,10 +27,10 @@
/// @file p9_mss_power_cleanup.C
/// @brief Perform any necessary power cleanup
///
-// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Owner: Jacob Harvey <jlharvey@us.ibm.com>
// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 1
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#include <fapi2.H>
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_power_cleanup.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_power_cleanup.H
index 5d6fade42..17cbb3715 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_power_cleanup.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_power_cleanup.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -26,10 +26,10 @@
/// @file p9_mss_power_cleanup.H
/// @brief Perform any necessary power cleanup
///
-// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Owner: Jacob Harvey <jlharvey@us.ibm.com>
// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 1
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#ifndef __P9_MSS_POWERCLEAN__
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
index fe1e34dbd..d77bc4f32 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.C
@@ -27,10 +27,10 @@
/// @file p9_mss_scominit.C
/// @brief SCOM inits for PHY, MC
///
-// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com>
// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#include <fapi2.H>
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.H
index 1e3ca4a79..3f4ee4a5c 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scominit.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -27,10 +27,10 @@
/// @file p9_mss_scominit.C
/// @brief SCOM inits for PHY, MC
///
-// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com>
// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 1
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#ifndef __P9_MSS_SCOMINIT__
@@ -53,4 +53,3 @@ extern "C"
}
#endif
-
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.C
index 02a1cd282..10e09a14b 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.C
@@ -27,10 +27,10 @@
/// @file p9_mss_scrub.C
/// @brief Begin background scrub
///
-// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 1
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#include <fapi2.H>
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.H
index cc95a8aae..3e40ac84c 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_scrub.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -27,10 +27,10 @@
/// @file p9_mss_scrub.H
/// @brief Begin background scrub
///
-// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
// *HWP FW Owner: Andre Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 1
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#ifndef __P9_MSS_SCRUB__
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.C
index 1c15dd765..d9a6398ce 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.C
@@ -28,9 +28,9 @@
/// @brief Write the runtime memory throttle settings from attributes to scom registers
///
// *HWP HWP Owner: Jacob Harvey <jlharvey@us.ibm.com>
-// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Backup: Louis Stermole <stermole@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: Cronus
#include <fapi2.H>
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.H
index c9061ea8c..bd2bd889b 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -27,9 +27,9 @@
/// @brief Write the runtime memory throttle settings from attributes to scom registers
///
// *HWP HWP Owner: Jacob Harvey <jlharvey@us.ibm.com>
-// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Backup: Louis Stermole <stermole@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: Cronus
//
#ifndef __P9_MSS_THROTTLE_MEM__
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