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author | Stephen Glancy <sglancy@us.ibm.com> | 2018-10-08 20:39:05 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-12-05 17:28:22 -0600 |
commit | 09524b1a8bf8bba30fb52efe1e14341444342430 (patch) | |
tree | c6e04af6e2b1a8d4ee5f334a3a2342b0f239dc80 /src/import/chips/p9/procedures/hwp | |
parent | cda012113b8dd35fc6d440ea05c9e37ca9c71af6 (diff) | |
download | talos-hostboot-09524b1a8bf8bba30fb52efe1e14341444342430.tar.gz talos-hostboot-09524b1a8bf8bba30fb52efe1e14341444342430.zip |
Adds LRDIMM MRD - DRAM to buffer RD calibration
Change-Id: I66de2a4738c3f07d50635add2ae9ea71a55b69d9
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67185
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68029
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
3 files changed, 10 insertions, 87 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.C index 41b719a48..bb403190b 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.C @@ -465,7 +465,7 @@ fapi2::ReturnCode mrep::analyze_result_for_each_nibble( const fapi2::Target<fapi (io_recorder.iv_final_delay == 0) ) { io_recorder.iv_final_delay = i_delay; - FAPI_DBG( "%s buffer:%u nibble:%u found a 0->1 transition at delay 0x%02x", + FAPI_DBG( "MREP %s buffer:%u nibble:%u found a 0->1 transition at delay 0x%02x", mss::c_str(i_target), i_buffer, i_nibble, i_delay ); } @@ -699,44 +699,6 @@ uint64_t mrep::calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_ /// @param[in] i_abort_on_error - whether or not we are aborting on cal error /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok /// -fapi2::ReturnCode mrd::run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, - const uint64_t i_rp, - const uint8_t i_abort_on_error ) const -{ - return fapi2::FAPI2_RC_SUCCESS; -} - -/// -/// @brief Executes a cal step with workarounds -/// @param[in] i_target - the MCA target on which to operate -/// @param[in] i_rp - the rank pair -/// @param[in] i_abort_on_error - whether or not we are aborting on cal error -/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok -/// -fapi2::ReturnCode mrd::execute( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, - const uint64_t i_rp, - const uint8_t i_abort_on_error ) const -{ - return fapi2::FAPI2_RC_SUCCESS; -} - -/// -/// @brief Calculates the number of cycles a given calibration step will take -/// @param[in] i_target - the MCA target on which to operate -/// @return l_cycles - the number of cycles a given calibration step wil take -/// -uint64_t mrd::calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) const -{ - return 0; -} - -/// -/// @brief Sets up and runs the calibration step -/// @param[in] i_target - the MCA target on which to operate -/// @param[in] i_rp - the rank pair -/// @param[in] i_abort_on_error - whether or not we are aborting on cal error -/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok -/// fapi2::ReturnCode mwd::run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, const uint64_t i_rp, const uint8_t i_abort_on_error ) const diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.H index fafb498ae..16d258390 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.H @@ -50,6 +50,7 @@ #include <lib/dimm/ddr4/pba.H> #include <lib/workarounds/ccs_workarounds.H> #include <lib/rosetta_map/rosetta_map.H> +#include <lib/phy/ddr_phy.H> // Disables LRDIMM support for HB #ifndef __HOSTBOOT_MODULE @@ -610,51 +611,6 @@ class mrep : public step /// /// @brief MPR training step /// -class mrd : public step -{ - public: - mrd() : - step("MRD") - {} - - /// - /// @brief Default virtual destructor - /// - ~mrd() = default; - - /// - /// @brief Sets up and runs the calibration step - /// @param[in] i_target - the MCA target on which to operate - /// @param[in] i_rp - the rank pair - /// @param[in] i_abort_on_error - whether or not we are aborting on cal error - /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok - /// - fapi2::ReturnCode run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, - const uint64_t i_rp, - const uint8_t i_abort_on_error ) const; - - /// - /// @brief Executes a cal step with workarounds - /// @param[in] i_target - the MCA target on which to operate - /// @param[in] i_rp - the rank pair - /// @param[in] i_abort_on_error - whether or not we are aborting on cal error - /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok - /// - fapi2::ReturnCode execute( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, - const uint64_t i_rp, - const uint8_t i_abort_on_error ) const; - - /// - /// @brief Calculates the number of cycles a given calibration step will take - /// @param[in] i_target - the MCA target on which to operate - /// @return l_cycles - the number of cycles a given calibration step wil take - /// - uint64_t calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) const; -}; - -/// -/// @brief MPR training step -/// class mwd : public step { public: diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.C index 14e3c1780..6d854ba63 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.C @@ -37,20 +37,17 @@ #include <vector> #include <initializer_list> - #include <fapi2.H> #include <mss.H> #include <lib/phy/ddr_phy.H> #include <lib/phy/mss_training.H> #include <lib/phy/mss_lrdimm_training.H> - #include <lib/workarounds/dp16_workarounds.H> #include <lib/workarounds/wr_vref_workarounds.H> #include <lib/dimm/ddr4/latch_wr_vref.H> #include <lib/workarounds/seq_workarounds.H> #include <lib/workarounds/dqs_align_workarounds.H> #include <lib/workarounds/ccs_workarounds.H> - #include <generic/memory/lib/utils/scom.H> #include <generic/memory/lib/utils/count_dimm.H> #include <lib/dimm/rank.H> @@ -61,6 +58,7 @@ #ifdef LRDIMM_CAPABLE #include <lib/phy/mss_dwl.H> + #include <lib/phy/mss_mrd_fine.H> #endif namespace mss @@ -1227,6 +1225,13 @@ std::vector<std::shared_ptr<step>> steps_factory(const fapi2::buffer<uint32_t>& #ifdef LRDIMM_CAPABLE + // MRD_FINE + if(i_cal_steps.getBit<mss::cal_steps::MRD_FINE>()) + { + FAPI_INF("LRDIMM: MRD_FINE is enabled"); + l_steps.push_back(std::make_shared<mss::training::lrdimm::mrd_fine>()); + } + // DWL if(i_cal_steps.getBit<mss::cal_steps::DWL>()) { |