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authorPrasad Bg Ranganath <prasadbgr@in.ibm.com>2018-07-18 08:56:40 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2018-07-20 13:27:58 -0500
commita0e63fb29fed84c4cd883b62967f7550bf46f7ce (patch)
treeee048bf7e1ac81471f1c36b8cf7b52d892c3f836 /src/import/chips/p9/procedures/hwp/pm
parent4f0098cf3ce33d08a1b6a4afcfdec558d240a044 (diff)
downloadtalos-hostboot-a0e63fb29fed84c4cd883b62967f7550bf46f7ce.tar.gz
talos-hostboot-a0e63fb29fed84c4cd883b62967f7550bf46f7ce.zip
Bug fix for the Runtime pstate bias update
Change-Id: I6a0244878de5e8cc63e18453afcdd15bc3d8a835 CQ:SW438614 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62750 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62835 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm')
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C10
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C6
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C17
3 files changed, 15 insertions, 18 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C
index b4ac2bf3e..8483b9308 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pstate_gpe_init.C
@@ -312,8 +312,6 @@ fapi2::ReturnCode pstate_gpe_reset(
uint32_t l_timeout_in_MS = 100;
std::vector<uint64_t> l_pgpe_base_addr;
l_pgpe_base_addr.push_back( PGPE_BASE_ADDRESS );
- fapi2::ATTR_SAFE_MODE_FREQUENCY_MHZ_Type l_safe_mode_freq_mhz = 0;
- fapi2::ATTR_SAFE_MODE_VOLTAGE_MV_Type l_safe_mode_mv = 0;
FAPI_IMP(">> pstate_gpe_reset...");
@@ -366,14 +364,6 @@ fapi2::ReturnCode pstate_gpe_reset(
l_data64.flush<0>().clearBit<p9hcd::PGPE_ACTIVE>();
FAPI_TRY(putScom(i_target, PU_OCB_OCI_OCCS2_SCOM, l_data64));
-
- //Reset safe mode attributes
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SAFE_MODE_FREQUENCY_MHZ,
- i_target, l_safe_mode_freq_mhz));
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SAFE_MODE_VOLTAGE_MV,
- i_target, l_safe_mode_mv));
-
-
fapi_try_exit:
FAPI_IMP("<< pstate_gpe_reset...");
return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C
index efca95da7..b5b73d328 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C
@@ -478,6 +478,8 @@ p9_pm_reset_psafe_update(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ta
uint8_t l_chipNum = 0xFF;
fapi2::ATTR_SAFE_MODE_FREQUENCY_MHZ_Type l_attr_safe_mode_freq_mhz;
fapi2::ATTR_SAFE_MODE_VOLTAGE_MV_Type l_attr_safe_mode_mv;
+ fapi2::ATTR_SAFE_MODE_FREQUENCY_MHZ_Type l_attr_reset_safe_mode_freq_mhz = 0;
+ fapi2::ATTR_SAFE_MODE_VOLTAGE_MV_Type l_attr_reset_safe_mode_mv = 0;
fapi2::ATTR_VDD_AVSBUS_BUSNUM_Type l_vdd_bus_num;
fapi2::ATTR_VDD_AVSBUS_RAIL_Type l_vdd_bus_rail;
fapi2::ATTR_VDD_BOOT_VOLTAGE_Type l_vdd_voltage_mv;
@@ -497,6 +499,10 @@ p9_pm_reset_psafe_update(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ta
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_EXTERNAL_VRM_STEPSIZE, FAPI_SYSTEM, l_ext_vrm_step_size_mv));
l_attr_safe_mode_mv += l_uplift_mv;
+ //Reset safe mode attributes
+ FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SAFE_MODE_FREQUENCY_MHZ, i_target, l_attr_reset_safe_mode_freq_mhz));
+ FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SAFE_MODE_VOLTAGE_MV, i_target, l_attr_reset_safe_mode_mv));
+
do
{
FAPI_INF(">> p9_pm_reset_psafe_update");
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C
index 083b76663..81aebc04d 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C
@@ -677,22 +677,23 @@ p9_pstate_parameter_block( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_
&l_safe_mode_values,
l_poundw_data),
"Error from p9_pstate_safe_mode_computation function");
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SAFE_MODE_FREQUENCY_MHZ,
+ i_target,attr.attr_pm_safe_frequency_mhz ));
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SAFE_MODE_VOLTAGE_MV,
+ i_target, attr.attr_pm_safe_voltage_mv));
}
- else
- {
- // safe_voltage_mv
- l_globalppb.safe_voltage_mv = revle32(attr.attr_pm_safe_voltage_mv);
+ // safe_voltage_mv
+ l_globalppb.safe_voltage_mv = revle32(attr.attr_pm_safe_voltage_mv);
- // safe_frequency_khz
- l_globalppb.safe_frequency_khz =
+ // safe_frequency_khz
+ l_globalppb.safe_frequency_khz =
revle32(attr.attr_pm_safe_frequency_mhz * 1000);
- FAPI_INF("Safe Mode Frequency %d (0x%X) kHz; Voltage %d (0x%X) mV",
+ FAPI_INF("Safe Mode Frequency %d (0x%X) kHz; Voltage %d (0x%X) mV",
revle32(l_globalppb.safe_frequency_khz),
revle32(l_globalppb.safe_frequency_khz),
revle32(l_globalppb.safe_voltage_mv),
revle32(l_globalppb.safe_voltage_mv));
- }
// ----------------
// get Resonant clocking attributes
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