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author | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-10-14 13:07:08 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-10-15 08:48:17 -0500 |
commit | 99761f93896da24de7ad18561ecd3519645d4f1e (patch) | |
tree | 8021fdbe11a24c5047fcb6ec4813b521c6263419 /src/import/chips/p9/procedures/hwp/pm | |
parent | 78f90ced0fa36c4d682b2c7bf0c1af973b0e7755 (diff) | |
download | talos-hostboot-99761f93896da24de7ad18561ecd3519645d4f1e.tar.gz talos-hostboot-99761f93896da24de7ad18561ecd3519645d4f1e.zip |
Revert "P10 prep: Infrastructure (IS) ring Id metadata and API changes"
This reverts commit 52b76be222254e59959db984606c09dae854270b.
Accidental merge before ekb was complete.
Change-Id: I59412ecad661596322aaba5cb5cf83190727d64f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67455
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C | 26 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_scan_ring_util.C | 6 |
2 files changed, 16 insertions, 16 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C index 36c5d3903..fa0340fac 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C @@ -1975,7 +1975,7 @@ uint32_t getPpeScanRings( void* const i_pHwImage, i_ringData.iv_pRingBuffer, i_ringData.iv_ringBufSize, (i_ppeType == PLAT_CME) ? SYSPHASE_RT_CME : SYSPHASE_RT_SGPE, - 0, // Was MODEBUILD_IPL=0 but not used in P9 + MODEBUILD_IPL, i_ringData.iv_pWorkBuf1, i_ringData.iv_sizeWorkBuf1, i_ringData.iv_pWorkBuf2, @@ -2066,7 +2066,7 @@ uint32_t getPpeScanRings( void* const i_pHwImage, tempBufSize, i_debugMode ); - if( TOR_RING_IS_EMPTY == rc ) + if( TOR_RING_NOT_FOUND == rc ) { tempBufSize = 0; continue; @@ -2558,9 +2558,9 @@ fapi2::ReturnCode layoutCmnRingsForCme( Homerlayout_t* i_pHomer, ringSize, i_debugMode ); - if( TOR_RING_IS_EMPTY == rc ) + if( TOR_RING_NOT_FOUND == rc ) { - FAPI_INF( "Core common ring %s has no content", + FAPI_INF( "Did not find core common ring %s ", io_cmeRings.getRingName( coreCmnRingId ) ); ringSize = 0; continue; @@ -2675,7 +2675,7 @@ fapi2::ReturnCode layoutInstRingsForCme( Homerlayout_t* i_pHomer, tempSize, i_debugMode ); - if( TOR_RING_IS_EMPTY == rc ) + if( TOR_RING_NOT_FOUND == rc ) { FAPI_DBG( "could not determine size of ring id %d of core %d", io_cmeRings.getInstRingId(0), ((2 * exId) + coreId) ); @@ -2739,9 +2739,9 @@ fapi2::ReturnCode layoutInstRingsForCme( Homerlayout_t* i_pHomer, tempSize, i_debugMode ); - if( TOR_RING_IS_EMPTY == rc ) + if( TOR_RING_NOT_FOUND == rc ) { - FAPI_INF("Instance ring Id %d has no content for EX %d core %d", + FAPI_INF("Instance ring Id %d not found for EX %d core %d", io_cmeRings.getInstRingId(0), exId, coreId ); tempSize = 0; continue; @@ -2849,7 +2849,7 @@ fapi2::ReturnCode layoutCmeScanOverride( Homerlayout_t* i_pHomer, tempBufSize, i_debugMode ); - if( TOR_RING_IS_EMPTY == rc ) + if( TOR_RING_NOT_FOUND == rc ) { tempBufSize = 0; continue; @@ -3218,9 +3218,9 @@ fapi2::ReturnCode layoutCmnRingsForSgpe( Homerlayout_t* i_pHomer, i_debugMode ); - if( TOR_RING_IS_EMPTY == rc ) + if( TOR_RING_NOT_FOUND == rc ) { - FAPI_INF( "Quad common ring %s has no content", + FAPI_INF( "did not find quad common ring %s", io_sgpeRings.getRingName( torRingId ) ); tempBufSize = 0; continue; @@ -3317,7 +3317,7 @@ fapi2::ReturnCode layoutInstRingsForSgpe( Homerlayout_t* i_pHomer, uint32_t tempBufSize = 0; uint32_t tempLength = 0; - for( uint32_t ringIndex = 0; ringIndex < EQ::g_chipletData.numInstanceRingsScanAddr; + for( uint32_t ringIndex = 0; ringIndex < EQ::g_chipletData.iv_num_instance_rings_scan_addrs; ringIndex++ ) { tempBufSize = i_ringData.iv_sizeWorkBuf1; @@ -3334,9 +3334,9 @@ fapi2::ReturnCode layoutInstRingsForSgpe( Homerlayout_t* i_pHomer, tempBufSize, i_debugMode ); - if( TOR_RING_IS_EMPTY == rc ) + if( TOR_RING_NOT_FOUND == rc ) { - FAPI_DBG( "Quad spec ring %s has no content for cache Inst %d", + FAPI_DBG( "did not find quad spec ring %s for cache Inst %d", io_sgpeRings.getRingName( quadSpecRingId ), cacheInst ); tempBufSize = 0; continue; diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_scan_ring_util.C b/src/import/chips/p9/procedures/hwp/pm/p9_scan_ring_util.C index 81ad2ad05..def3c096b 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_scan_ring_util.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_scan_ring_util.C @@ -271,7 +271,7 @@ RingBucket::RingBucket( PlatId i_plat, uint8_t* i_pRingStart, RingDebugMode_t i_ iv_cmnRingMap[ringIndex] = l_quadCmnRings[ringIndex]; } - for( ringIndex = 0; ringIndex < ( EQ::g_chipletData.numInstanceRingsScanAddr * MAX_QUADS_PER_CHIP ); + for( ringIndex = 0; ringIndex < ( EQ::g_chipletData.iv_num_instance_rings_scan_addrs * MAX_QUADS_PER_CHIP ); ringIndex++ ) { iv_instRingMap[ringIndex] = l_quadSpecRings[ringIndex]; @@ -643,12 +643,12 @@ void RingBucket::dumpRings( ) if( iv_plat == PLAT_CME ) { FAPI_INF("---------------------------------CME Rings---------------------------------------"); - chipletNo = EC::g_chipletData.numInstanceRingsScanAddr; + chipletNo = EC::g_chipletData.iv_num_instance_rings_scan_addrs; } else if( iv_plat == PLAT_SGPE ) { FAPI_INF("---------------------------------SGPE Rings--------------------------------------"); - chipletNo = EQ::g_chipletData.numInstanceRingsScanAddr; + chipletNo = EQ::g_chipletData.iv_num_instance_rings_scan_addrs; } else { |