JET: Level 1, p9_pm_pba_init

Change-Id: Ib26e4f678a6c672ebeddb07906785c340b6dd48e
RTC: 137021
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21314
Tested-by: Jenkins Server
Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23837
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>

3 files changed, 378 insertions, 0 deletions

diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_init.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_init.C
new file mode 100755
index 000000000..93a5c3d3f
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_init.C
@@ -0,0 +1,183 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: chips/p9/procedures/hwp/pm/p9_pm_pba_init.C $                 */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* EKB Project                                                            */
+/*                                                                        */
+/* COPYRIGHT 2015                                                         */
+/* [+] <                                                                  */
+/*                                                                        */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file p9_pm_pba_init.C
+/// @brief Initialize PBA registers for modes PM_INIT, PM_RESET
+///
+// *HWP HWP Owner: Greg Still <stillgs@us.ibm.com>
+// *HWP FW Owner:  Sangeetha T S <sangeet2@in.ibm.com>
+// *HWP Team: PM
+// *HWP Level: 1
+// *HWP Consumed by: HS
+
+// ----------------------------------------------------------------------
+// Includes
+// ----------------------------------------------------------------------
+
+#include <p9_pm_pba_init.H>
+
+// ----------------------------------------------------------------------
+// Local Function prototypes
+// ----------------------------------------------------------------------
+
+///
+/// @brief call pba_slave_setup_init
+///
+/// @param[in] i_target Chip target
+///
+/// @return FAPI2_RC_SUCCESS on success, else error.
+///
+fapi2::ReturnCode pba_init (
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target );
+
+///
+/// @brief call pba_slave_reset
+///
+/// @param[in] i_target Chip target
+///
+/// @return FAPI2_RC_SUCCESS on success, else error.
+///
+fapi2::ReturnCode pba_reset (
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target );
+
+///
+/// @brief: PgP PBA Setup
+///
+/// The PBA is 'set up' twice. The first set up is via scan-0 settings or
+/// SBE-IPL code to enable the Host Boot image to be injected into the cache
+/// of the IPL core.
+///
+/// This procedure performs the setup that will be done prior to releasing the
+/// OCC from reset. This setup serves both the initial boot of OCC as well as
+/// for the OCC/PM reset flow performed during runtime.
+///
+/// PBA slave 0 is reserved to the GPE engines, which must be able to switch
+/// modes to read from mainstore or Centaur inband SCOM spaces, and write
+/// Centaur inband SCOMs and also write into mainstore using IMA to support
+/// the Power Proxy Trace application.
+///
+/// PBA slave 1 is dedicated to the 405 ICU/DCU. This PBA slave is used for
+/// the initial boot, and for the initial runtime code that manages the OCC
+/// applet table.  Once OCC has initialzied applets, OCC FW will remove all
+/// TLB mappings associated with mainstore, effectively disabling this slave.
+///
+/// PBA Slave 2 is dedicated to the SGPE. Since 24x7 performance monitoring
+/// code can run on the SGPE, the SGPE is not only a read-only master, but is
+/// a generic read-write master like all of the others.
+///
+/// PBA Slave 3 is mapped to the OCB in order to service FSP direct read/write
+/// of mainstore.
+///
+/// The design of PBA allows read buffers to be dedicated to a particular
+/// slave, and requires that a slave have a dedicated read buffer in order to
+/// do aggressive prefetching. In the end there is little reason to partition
+/// the resources.  The SGPE will be running multiple applications that
+/// read and write main memory so we want to allow SGPE access to all
+/// resources.  It also isn't clear that aggressive prefetching provides any
+/// performacne boost. Another wrinkle is that the BCDE claims read buffer C
+/// whenever it runs, and the 405 I + D sides never run after the initial OCC
+/// startup. For these reasons all slaves are programmed to share all
+/// resources.
+///
+/// @param[in] i_target Chip target
+///
+/// @return FAPI2_RC_SUCCESS on success, else error.
+///
+fapi2::ReturnCode pba_slave_setup (
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target );
+
+///
+/// @brief Walk each slave to hit the respective reset and then poll for
+///        completion
+///
+/// @param[in] i_target Chip target
+///
+/// @return FAPI2_RC_SUCCESS on success, else error.
+///
+fapi2::ReturnCode pba_slave_reset(
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+///
+/// @brief Stop the BCDE and BCUE and then poll for respective completion
+///
+/// @param[in] i_target Chip target
+///
+/// @return FAPI2_RC_SUCCESS on success, else error.
+///
+fapi2::ReturnCode pba_bc_stop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+
+// ----------------------------------------------------------------------
+// Function definitions
+// ----------------------------------------------------------------------
+fapi2::ReturnCode p9_pm_pba_init(
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+    const p9pm::PM_FLOW_MODE i_mode)
+{
+    FAPI_IMP(" Entering p9_pm_pba_init");
+
+    FAPI_IMP("p9_pm_pba_init Exit");
+    return fapi2::current_err;
+}
+
+// ***************************** mode = PM_RESET ******************************
+fapi2::ReturnCode pba_reset(
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+    FAPI_IMP("Entering pba_reset ...");
+
+    return fapi2::current_err;
+}
+
+// ***************************** mode = PM_INIT *****************************
+fapi2::ReturnCode pba_init(
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+    FAPI_IMP("Entering pba_init ...");
+
+    return fapi2::current_err;
+}
+
+// ******************************** pba_slave_setup ***************************
+fapi2::ReturnCode pba_slave_setup(
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+    FAPI_IMP("Entering pba_slave_setup");
+
+    return fapi2::current_err;
+}
+
+// ************************** pba_slave_reset **********************************
+fapi2::ReturnCode pba_slave_reset(
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+    FAPI_IMP("Entering pba_slave_reset");
+
+    return fapi2::current_err;
+}
+
+// ****************************** pba_bc_stop **********************************
+fapi2::ReturnCode pba_bc_stop(
+    const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+    FAPI_IMP("Entering pba_bc_stop...");
+
+    return fapi2::current_err;
+}
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_init.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_init.H
new file mode 100755
index 000000000..7f88c444f
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_init.H
@@ -0,0 +1,175 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: chips/p9/procedures/hwp/pm/p9_pm_pba_init.H $                 */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* EKB Project                                                            */
+/*                                                                        */
+/* COPYRIGHT 2015                                                         */
+/* [+] <                                                                  */
+/*                                                                        */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file: p9_pm_pba_init.H
+/// @brief: Initialize PBA registers for modes PM_INIT, PM_RESET
+///
+// *HWP HWP Owner: Greg Still <stillgs@us.ibm.com>
+// *HWP FW Owner: Sangeetha T S <sangeet2@in.ibm.com>
+// *HWP Team: PM
+// *HWP Level: 1
+// *HWP Consumed by: HS
+//
+
+///
+///   @verbatim
+///
+///       high level flow:
+///           if {i_mode == PM_INIT)
+///               rc =  pba_init_init(i_target);
+///           else if (i_mode == PM_RESET)
+///               rc =  pba_init_reset(i_target);
+///   @endverbatim
+///
+
+#ifndef _P9_PBAINIT_H_
+#define _P9_PBAINIT_H_
+
+// ----------------------------------------------------------------------
+// Includes
+// ----------------------------------------------------------------------
+#include <fapi2.H>
+#include <p9_pm.H>
+
+// ----------------------------------------------------------------------
+// Constant Defintions
+// ----------------------------------------------------------------------
+namespace p9pba
+{
+// BCDE and BCUE Status registers bits
+enum PBA_BC_STAT
+{
+    PBA_BC_STAT_RUNNING = 0,
+    PBA_BC_STAT_STOPPED = 29,
+    PBA_BC_STAT_ERROR   = 30,
+    PBA_BC_STAT_DONE    = 31
+};
+
+// Valid command scope.
+enum CMD_SCOPE
+{
+    LOCAL_NODAL    = 0x00,
+    NEAR_NODE      = 0x02,
+    GROUP          = 0x03,
+    REMOTE_NODE    = 0x04,
+    VECTORED_GROUP = 0x5
+};
+
+// Maximum number of Polls for PBA slave reset
+enum PBA_SLAVE_POLL
+{
+    MAX_PBA_RESET_POLLS = 16 , // in microseconds
+    PBA_RESET_POLL_DELAY = 1
+};
+
+// Maximum number of Polls for PBA Block Copy Stopping - 500ms timeout
+enum PBA_BLOCK_COPY_POLL
+{
+    MAX_PBA_BC_STOP_POLLS = 256 ,        // in microseconds
+    PBA_BC_STOP_POLL_DELAY = 10
+};
+
+// structure of values for cmd_scope, pba and pbabar initialization
+struct pba_cmd_init
+{
+    CMD_SCOPE cmd_scope;
+    uint64_t  addr;
+    uint64_t  size;
+};
+
+struct pba_cmd_init_reg
+{
+    pba_cmd_init regs0;
+    pba_cmd_init regs1;
+    pba_cmd_init regs2;
+    pba_cmd_init regs3;
+};
+
+struct pba_bar_fields
+{
+    CMD_SCOPE cmd_scope;
+    uint8_t   reserved_1;
+    uint16_t  non_maskable_base_addr;
+    uint32_t  maskable_base_addr;
+    uint8_t   reserved_2;
+    uint16_t  vtarget;
+};
+
+struct pba_barmask_fields
+{
+    uint32_t reserved_1;
+    uint32_t mask;
+    uint32_t reserved_2;
+};
+
+struct pba_bar_init_type
+{
+    pba_bar_fields     bar_reg;
+    pba_barmask_fields barmsk_reg;
+};
+
+struct pba_bar_init_type_all
+{
+    pba_bar_init_type pba_bar0_init;
+    pba_bar_init_type pba_bar1_init;
+    pba_bar_init_type pba_bar2_init;
+    pba_bar_init_type pba_bar3_init;
+};
+
+typedef uint64_t pba_slvctl_type;
+
+struct pbax_config_fields
+{
+    uint32_t  reserved_0;
+    char      pm_pbax_pcv_reserv_timeout;
+    uint8_t   reserved_1;
+    char      pm_pbax_snd_retry_count_overcommit_enable;
+    uint8_t   pm_pbax_snd_retry_threshold;
+    uint8_t   pm_pbax_snd_reserv_timeout;
+    uint32_t  reserved_2;
+};
+} //namespace
+
+// function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode (*p9_pm_pba_init_FP_t)
+(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&,
+ const p9pm::PM_FLOW_MODE);
+
+extern "C" {
+
+// ----------------------------------------------------------------------
+// Function prototypes
+// ----------------------------------------------------------------------
+
+///
+/// @brief Set the pba registers depending on "mode"
+///
+/// @param[in] i_target Chip target
+/// @param[in] i_mode   Mode
+///
+/// @return FAPI2_RC_SUCCESS on success or error return code
+///
+    fapi2::ReturnCode p9_pm_pba_init
+    (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+     const p9pm::PM_FLOW_MODE i_mode);
+}
+
+#endif // _P9_PBAINIT_H_
+
+
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_init.mk b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_init.mk
new file mode 100644
index 000000000..550bd55c1
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_pba_init.mk
@@ -0,0 +1,20 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: chips/p9/procedures/hwp/pm/p9_pm_pba_init.mk $
+#
+# IBM CONFIDENTIAL
+#
+# EKB Project
+#
+# COPYRIGHT 2015
+# [+] <
+#
+#
+# The source code for this program is not published or otherwise
+# divested of its trade secrets, irrespective of what has been
+# deposited with the U.S. Copyright Office.
+#
+# IBM_PROLOG_END_TAG
+PROCEDURE=p9_pm_pba_init
+$(call BUILD_PROCEDURE)