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| author | Prasad Bg Ranganath <prasadbgr@in.ibm.com> | 2018-07-25 05:25:10 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-08-06 09:30:43 -0500 |
| commit | 8f2be4b1063a95e66d602e6baa4f9baab16d27ab (patch) | |
| tree | 959ee6f7105b4c189df24823fcce3919f409f3ea /src/import/chips/p9/procedures/hwp/pm | |
| parent | c87bd309d9bc19fcb339f7fcd1c908e9f5a30440 (diff) | |
| download | talos-hostboot-8f2be4b1063a95e66d602e6baa4f9baab16d27ab.tar.gz talos-hostboot-8f2be4b1063a95e66d602e6baa4f9baab16d27ab.zip | |
PM:Clear GPE2 error bit in OISR/IMR register before SGPE boots
Change-Id: I10729ec856bcd3167c1cdb53acc14f918a5f90ab
CQ:SW439095
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63271
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63275
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_pm_stop_gpe_init.C | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_stop_gpe_init.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_stop_gpe_init.C index 4835410f9..16a06c8b7 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_stop_gpe_init.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_stop_gpe_init.C @@ -72,6 +72,7 @@ #include <p9_misc_scom_addresses.H> #include <p9_misc_scom_addresses_fld.H> #include <p9n2_misc_scom_addresses.H> +#include <p9n2_misc_scom_addresses_fld.H> // ---------------------------------------------------------------------- // Constants @@ -300,6 +301,15 @@ fapi2::ReturnCode p9_pm_stop_gpe_init( } } + //First mask bit 7 in OIMR and then clear bit 7 in OISR + l_data64.flush<0>().setBit<P9N2_PU_OCB_OCI_OISR0_GPE2_ERROR>(); + + //mask bit 7 + FAPI_TRY(fapi2::putScom(i_target, P9N2_PU_OCB_OCI_OIMR0_SCOM2, l_data64)); + //clear bit 7 + FAPI_TRY(fapi2::putScom(i_target, P9N2_PU_OCB_OCI_OISR0_SCOM1, l_data64)); + + // Setup the SGPE Timer Selects // These hardcoded values are assumed by the SGPE Hcode for setting up // the FIT and Watchdog values. |
