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authorPrem Shanker Jha <premjha2@in.ibm.com>2016-12-05 05:52:38 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-01-04 20:53:40 -0500
commit5de1f565ce65936a05b816dc67d903cf22097e53 (patch)
tree590553035063c3dcd6d7a75e38e452a404760092 /src/import/chips/p9/procedures/hwp/pm
parent50eea64037f460107675589253e92a7d9b00065b (diff)
downloadtalos-hostboot-5de1f565ce65936a05b816dc67d903cf22097e53.tar.gz
talos-hostboot-5de1f565ce65936a05b816dc67d903cf22097e53.zip
PM: Updated flag field in SGPE Image header.
- Added support for SMALL SYSTEM and BIG SYSTEM Change-Id: If78cdc86e2cd4764b78e8e7c464871e15454087e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33397 Dev-Ready: ADAM S. HALE <ashale@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ADAM S. HALE <ashale@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33398 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm')
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C17
1 files changed, 16 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
index 695884191..f3b4d9587 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
@@ -550,7 +550,7 @@ extern "C"
* @param i_pChipHomer points to HOMER image.
* @return fapi2 return code.
*/
- fapi2::ReturnCode updateImageFlags( Homerlayout_t* i_pChipHomer )
+ fapi2::ReturnCode updateImageFlags( Homerlayout_t* i_pChipHomer )
{
uint8_t attrVal = 0;
uint32_t cmeFlag = 0;
@@ -560,6 +560,7 @@ extern "C"
cmeHeader_t* pCmeHdr = (cmeHeader_t*) & i_pChipHomer->cpmrRegion.cmeSramRegion[CME_INT_VECTOR_SIZE];
sgpeHeader_t* pSgpeHdr = (sgpeHeader_t*)& i_pChipHomer->qpmrRegion.sgpeRegion.sgpeSramImage[SGPE_INT_VECT];
+ //Handling flags common to CME and SGPE
FAPI_DBG(" ==================== CME/SGPE Flags =================");
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_STOP4_DISABLE,
@@ -614,6 +615,20 @@ extern "C"
FAPI_DBG("STOP_11_to_8 : %s", attrVal ? "TRUE" : "FALSE" );
+ //Handling SGPE specific flag
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_ADDR_BAR_MODE,
+ FAPI_SYSTEM,
+ attrVal),
+ "Error from FAPI_ATTR_GET for attribute ATTR_PROC_FABRIC_ADDR_BAR_MODE");
+
+ //Attribute set to 0x01 for SMALL_SYSTEM
+ if( attrVal )
+ {
+ sgpeFlag |= SGPE_PROC_FAB_ADDR_BAR_MODE_POS;
+ }
+
+ FAPI_DBG("SMALL_SYSTEM : %s", attrVal ? "TRUE" : "FALSE" );
+ //Updating flag field in CME/SGPE Image header
pCmeHdr->g_cme_mode_flags = SWIZZLE_4_BYTE(cmeFlag);
pSgpeHdr->g_sgpe_reserve_flags = SWIZZLE_4_BYTE(sgpeFlag);
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