SMF: Populates unsecure HOMER with SC2 instruction.

On an SMF enabled system, if HV engages self save, core must
must transition from HV to UV privilege to accomplish this.
So, before attempting self save, core must execute SC2
instruction with HV privilege inorder to be a UV. Commit is a
partial implementaiton of this solution. It populates a
buffer with SC2 instruction which hostboot will copy to an
unsecure memory.

- Updated attribute tags for MRW Hiding
- Removed writing of ATTR_UNSECURE_HOMER_SIZE in deference
  to attribute default checking

Key_Cronus_Test=PM_REGRESS

Change-Id: Idb5e219e2a5f9b2274602aedc420f390f34f2609
RTC: 202400
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69655
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Dev-Ready: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69662
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

2 files changed, 72 insertions, 2 deletions

diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
index c408c1dd8..26b86098c 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
@@ -144,6 +144,8 @@ enum
     CORE_REST_WORDS_PER_THREAD  =  (CORE_RESTORE_SIZE_PER_THREAD >> 2),
     TWO_MB_ALIGNMENT_CHECK      =   0x1FFFFF,
     SMF_BIT_CHECK               =   0x0001000000000000ull,
+    INST_VALUE_SC2              =   0x44400042,
+    SRESET_WORD_POS             =   0x40,
 };
 
 /**
@@ -4797,6 +4799,14 @@ fapi_try_exit:
 
 //---------------------------------------------------------------------------
 
+/**
+ * @brief       populates CME image header with base address of unsecure HOMER.
+ * @param[in]   i_procTgt   fapi2 target for P9 chip
+ * @param[in]   i_pHomer    points to HOMER
+ * @return      fapi2 return code
+ * @note:       initializes CME image header irrespective of SMF enable state for
+ * simplicity. It will be a behave as NOP for SMF disabled system.
+ */
 fapi2::ReturnCode populateUnsecureHomerAddress( CONST_FAPI2_PROC& i_procTgt, Homerlayout_t*     i_pHomer )
 {
     uint64_t l_unsecureHomerAdd     =   0;
@@ -4809,6 +4819,7 @@ fapi2::ReturnCode populateUnsecureHomerAddress( CONST_FAPI2_PROC& i_procTgt, Hom
                            i_procTgt,
                            l_unsecureHomerAdd),
              "Error from FAPI_ATTR_GET for attribute ATTR_UNSECURE_HOMER_ADDRESS");
+
     FAPI_INF( "Atrribute ATTR_UNSECURE_HOMER_ADDRESS 0x%016lx", l_unsecureHomerAdd );
 
     if( l_unsecureHomerAdd & 0x1fffff )
@@ -4834,6 +4845,56 @@ fapi2::ReturnCode populateUnsecureHomerAddress( CONST_FAPI2_PROC& i_procTgt, Hom
 
 //--------------------------------------------------------------------------------------------------------
 
+/**
+ * @brief       initializes temp buffer with special attn and sc2 instruction.
+ * @param[in]   i_pBuf2     points to temp buffer
+ * @param[in]   i_sizeBuf2  size of temp buffer
+ * @return      fapi2 return code
+ * @note:       initializes buffer irrespective of SMF enable state for simplicity.
+ * It will behave as NOP for SMF disabled systems.
+ */
+fapi2::ReturnCode   initUnsecureHomer( void* const  i_pBuf2, const uint32_t  i_sizeBuf2 )
+{
+    FAPI_DBG( ">> initUnsecureHomer" );
+    const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
+    uint32_t l_unsecureHomerSize    =  ONE_KB;
+    uint32_t l_attr_unsecureHomerSize;
+    uint32_t * l_pWord              =  (uint32_t *) i_pBuf2;
+    uint32_t l_initInst             =  SWIZZLE_4_BYTE(CORE_RESTORE_PAD_OPCODE);
+
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_UNSECURE_HOMER_SIZE,
+                           FAPI_SYSTEM,
+                           l_attr_unsecureHomerSize),
+              "Error from FAPI_ATTR_GET for attribute ATTR_UNSECURE_HOMER_SIZE" );
+
+    FAPI_ASSERT( ( i_sizeBuf2 >= l_unsecureHomerSize &&
+                   l_attr_unsecureHomerSize >= l_unsecureHomerSize ),
+                 fapi2::FAILED_TO_INIT_UNSECURE_HOMER()
+                 .set_UNSECURE_HOMER_MIN_SIZE( l_unsecureHomerSize )
+                 .set_UNSECURE_HOMER_ACTUAL_SIZE( l_attr_unsecureHomerSize )
+                 .set_TEMP_BUFFER_SIZE( i_sizeBuf2  ),
+                 "Bad size value for unsecure HOMER attr=0x%08x min=0x%08x buf=0x%08x",
+                           l_attr_unsecureHomerSize, l_unsecureHomerSize, i_sizeBuf2  );
+
+
+    l_unsecureHomerSize     =   (l_unsecureHomerSize >> 2);
+
+    for( size_t wordCnt = 0; wordCnt < l_unsecureHomerSize; wordCnt++ )
+    {
+       memcpy( l_pWord + wordCnt, &l_initInst, sizeof(uint32_t) );
+    }
+
+    l_initInst              =   INST_VALUE_SC2;
+    memcpy( l_pWord + SRESET_WORD_POS, &l_initInst, sizeof(uint32_t) );
+
+    fapi_try_exit:
+    FAPI_DBG( "<< initUnsecureHomer" );
+    return fapi2::current_err;
+}
+
+//--------------------------------------------------------------------------------------------------------
+
 fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt,
                                         void* const     i_pImageIn,
                                         void*           i_pHomerImage,
@@ -5068,6 +5129,9 @@ fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt,
     FAPI_TRY( verifySprSelfSave( i_pHomerImage, fuseModeState, l_chipFuncModel ),
               "Failed to create SPR self save restore entry" );
 
+    FAPI_TRY( initUnsecureHomer( i_pBuf2, i_sizeBuf2 ),
+              "Failed to initialize unsecure HOMER" );
+
 fapi_try_exit:
     FAPI_IMP("<< p9_hcode_image_build" );
     return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H
index 71da30d0a..44bb05fe2 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -182,7 +182,13 @@ extern "C"
     * @param   i_sizeBuf3       size of work buffer3
     * @param   i_pBuf4          pointer to a work buffer4. Minimum size expected WORK_BUF_SIZE.
     * @param   i_sizeBuf4       size of work buffer4
-    * @note    needs attribute ATTR_EC
+    * @note    at the end of HWP, first 1KB(typically) of the buffer pointed to by i_pBuf2 is
+    * initialized with special attention instruction. At an offset of 0x100 bytes, SC2 instruction
+    * is populated. In an SMF enabled system, this region of buffer will be copied to a main store
+    * location known as unsecure HOMER. During STOP entry, CME will point core to that location of
+    * memory and do an SRESET. This will force core to execute SC2 instruction. It will cause core
+    * to transition from HV to UV state. This transition is necessary for enabling self-save of all
+    * supported SPRs.
     */
     fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt,
                                             void* const     i_pImageIn,