summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/hwp/pm
diff options
context:
space:
mode:
authorRaja Das <rajadas2@in.ibm.com>2018-06-27 06:18:29 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-07-17 10:47:12 -0400
commit38834a9cad0bb0929dab348745c296956c71b511 (patch)
tree801ed1e8ce41474466bf0583e6d96b198c985228 /src/import/chips/p9/procedures/hwp/pm
parent8df62cd15e91e7a497573555ba781e3bf5e62fa4 (diff)
downloadtalos-hostboot-38834a9cad0bb0929dab348745c296956c71b511.tar.gz
talos-hostboot-38834a9cad0bb0929dab348745c296956c71b511.zip
Inverted logic of hasClock bit in Clock Status register
CQ: SW437571 Change-Id: I9101adc63225a97aeddf445519fa660d961c3d9c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61463 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61472 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm')
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_query_core_access_state.C4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_query_core_access_state.C b/src/import/chips/p9/procedures/hwp/pm/p9_query_core_access_state.C
index f68d13673..846b2dba6 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_query_core_access_state.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_query_core_access_state.C
@@ -175,7 +175,11 @@ p9_query_core_access_state(
FAPI_TRY(fapi2::getScom(i_target, C_CLOCK_STAT_SL, l_data64), "Error reading data from C_CLOCK_STAT_SL");
l_data64.extractToRight<uint8_t>(c_exec_hasclocks, 6, 1);
+ // Inverted logic in the HW
+ c_exec_hasclocks = !c_exec_hasclocks;
l_data64.extractToRight<uint8_t>(c_pc_hasclocks, 5, 1);
+ // Inverted logic in the HW
+ c_pc_hasclocks = !c_pc_hasclocks;
}
else
{
OpenPOWER on IntegriCloud