Verify EQ/EX/Core clock/power states

Key_Cronus_Test=PM_REGRESS

Change-Id: Ia284c5e4127eae4616d0f6d5ede1a794f4dc7712
CQ:SW442778
CMVC-Prereq: 1065287
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64734
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64736
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 7 insertions, 1 deletions

diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_update_ec_eq_state.H b/src/import/chips/p9/procedures/hwp/pm/p9_update_ec_eq_state.H
index 387f2751b..6230fa13f 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_update_ec_eq_state.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_update_ec_eq_state.H
@@ -45,6 +45,9 @@
 #include <p9_misc_scom_addresses.H>
 #include <p9_perv_scom_addresses.H>
 #include <p9_quad_scom_addresses.H>
+#include <p9n2_quad_scom_addresses.H>
+#include <p9n2_quad_scom_addresses_fld.H>
+#include <p9n2_misc_scom_addresses.H>
 
 
 
@@ -80,10 +83,13 @@ extern "C" {
 /// @brief Select the Hostboot core from the available cores on the chip
 ///
 /// @param [in] i_target    Chip target
+/// @param [in] i_skip      if this is true,then skip updating QSSR for slave
+//                          proc
 ///
 
     fapi2::ReturnCode p9_update_ec_eq_state(
-        const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+        const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+        uint8_t i_qssr_skip = false);
 
 } // extern "C"