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author | Sudheendra K Srivathsa <sudheendraks@in.ibm.com> | 2016-02-12 01:42:35 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-06-10 22:16:34 -0400 |
commit | 947144f5e9f4075fc628a8f6a8d36a40f53a7a34 (patch) | |
tree | 2733fa30e7aa17665135b8b1475df12e938eefaf /src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H | |
parent | e7d82e55a60148e0caeb3efef6bf0c242e872a27 (diff) | |
download | talos-hostboot-947144f5e9f4075fc628a8f6a8d36a40f53a7a34.tar.gz talos-hostboot-947144f5e9f4075fc628a8f6a8d36a40f53a7a34.zip |
p9_setup_evid L2 commit
Change-Id: I1ec8f5d5b815b7f153d31a77e7239ff964fde556
Original-Change-Id: I923c0d7da9e825dbbb4a111648fc3457da22d572
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20613
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25672
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H b/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H new file mode 100644 index 000000000..63e89d702 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H @@ -0,0 +1,66 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: chips/p9/procedures/hwp/pm/p9_setup_evid.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* EKB Project */ +/* */ +/* COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file p9_setup_evid.H +/// @brief Setup External Voltage IDs +/// +/// *HW Owner : Sudheendra K Srivathsa <sudheendraks@in.ibm.com> +/// *FW Owner : Sangeetha T S <sangeet2@in.ibm.com> +/// *Team : PM +/// *Consumed by : HB +/// *Level : 2 +/// + +#ifndef __P9_SETUP_EVID_H__ +#define __P9_SETUP_EVID_H__ + +#include <fapi2.H> + +extern "C" +{ + +/// @typedef p9_setup_evid_FP_t +/// function pointer typedef definition for HWP call support + typedef fapi2::ReturnCode (*p9_setup_evid_FP_t) ( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&); + +/// @brief Read attributes containing part's boot voltages(VDD,VCS and VDN) +/// and set these voltage using the AVSBUS interface (VDD, VDN and VCS). +/// +/// @param [in] i_target TARGET_TYPE_PROC_CHIP +/// @attr +/// @attritem ATTR_VCS_BOOT_VOLTAGE - 1mV grandularity setting for VCS rail +/// @attritem ATTR_VDD_BOOT_VOLTAGE - 1mV grandularity setting for VDD rail +/// @attritem ATTR_VDN_BOOT_VOLTAGE - 1mV grandularity setting for VDN rail +/// @attritem ATTR_VDD_AVSBUS_BUSNUM - AVSBus Number having the VDD VRM +/// @attritem ATTR_VDD_AVSBUS_RAIL - AVSBus Rail number for VDD VRM +/// @attritem ATTR_VDN_AVSBUS_BUSNUM - AVSBus Number having the VDN VRM +/// @attritem ATTR_VDN_AVSBUS_RAIL - AVSBus Rail number for VDN VRM +/// @attritem ATTR_VCS_AVSBUS_BUSNUM - AVSBus Number having the VCS VRM +/// @attritem ATTR_VCS_AVSBUS_RAIL - AVSBus Rail number for VCS VRM +/// +/// @retval FAPI_RC_SUCCESS + fapi2::ReturnCode + p9_setup_evid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target); + + +} // extern C + +#endif // __P9_SETUP_EVID_H__ |