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authorGreg Still <stillgs@us.ibm.com>2016-04-22 07:10:46 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2016-05-24 10:57:11 -0400
commit281ca226bef10734a20de2f001d2a870f9c980aa (patch)
tree38fb71828eff68e9ffc3630978aecbcc57b8b8aa /src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
parent9edc0b6fedc30e608a10ebd5f69678b78b7c04e7 (diff)
downloadtalos-hostboot-281ca226bef10734a20de2f001d2a870f9c980aa.tar.gz
talos-hostboot-281ca226bef10734a20de2f001d2a870f9c980aa.zip
p9_pm_occ_control Fix OCC memory boot launching
- Build and push launcher instructions into OCC SRAM - Set SRAM Boot Vector 3 (FFFF_FFFC) to branch to launcher - Per OCC team, offset is HOMER+0x40 Change-Id: I2abbfea8de7b18d6010ee336031d0867cf9f0e99 RTC: 150818 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23561 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23563 Tested-by: FSP CI Jenkins Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H')
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H33
1 files changed, 32 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
index 6b8a523cc..f19da3733 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_utils.H
@@ -7,7 +7,7 @@
/* */
/* EKB Project */
/* */
-/* COPYRIGHT 2015 */
+/* COPYRIGHT 2015,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -51,6 +51,37 @@
#define SET_FIR_MASKED(b){mask.setBit<b>();}
#define CLEAR_FIR_MASK(b){mask.clearBit<b>()}
+
+/**
+ * @brief helper function to swizzle given input data
+ * @note swizles bytes to handle endianess issue.
+ */
+#if( __BYTE_ORDER == __BIG_ENDIAN )
+
+// NOP if it is a big endian system
+#define RevLe16(WORD) WORD
+#define RevLe32(WORD) WORD
+#define RevLe64(WORD) WORD
+
+#else
+#define RevLe16(WORD) \
+ ( (((WORD) >> 8) & 0x00FF) | (((WORD) << 8) & 0xFF00) )
+
+#define RevLe32(WORD) \
+ ( (((WORD) >> 24) & 0x000000FF) | (((WORD) >> 8) & 0x0000FF00) | \
+ (((WORD) << 8) & 0x00FF0000) | (((WORD) << 24) & 0xFF000000) )
+
+#define RevLe64(WORD) \
+ ( (((WORD) >> 56) & 0x00000000000000FF) | \
+ (((WORD) >> 40) & 0x000000000000FF00)| \
+ (((WORD) >> 24) & 0x0000000000FF0000) | \
+ (((WORD) >> 8) & 0x00000000FF000000) | \
+ (((WORD) << 8) & 0x000000FF00000000) | \
+ (((WORD) << 24) & 0x0000FF0000000000) | \
+ (((WORD) << 40) & 0x00FF000000000000) | \
+ (((WORD) << 56) & 0xFF00000000000000) )
+#endif
+
//------------------------------------------------------------------------------
// Function prototype
//------------------------------------------------------------------------------
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