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| author | Amit Kumar <akumar3@us.ibm.com> | 2017-01-06 00:59:59 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-02-17 12:46:02 -0500 |
| commit | 59611eb9cc49ca1aded75d69eff2ff7c27398004 (patch) | |
| tree | 4c15028c6d40cbb8e94c3f66450fac9f3dc7b107 /src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C | |
| parent | 52306946f268d843e6b14230d84672983d4a4d58 (diff) | |
| download | talos-hostboot-59611eb9cc49ca1aded75d69eff2ff7c27398004.tar.gz talos-hostboot-59611eb9cc49ca1aded75d69eff2ff7c27398004.zip | |
p9_pm_set_homer_bar:
- Added a check for 4MB alignment check
Change-Id: I3778194dad07f843587da628abde81e1d340be4a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34476
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34477
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C index 17b6f8d83..8cb7c9a1a 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -90,7 +90,7 @@ // ------------------------------------------------------------------------------ // Constant definitions // ------------------------------------------------------------------------------ -static const uint64_t BAR_MASK_MB_ALIGN = 0x00000000000FFFFFull; +static const uint64_t BAR_MASK_4MB_ALIGN = 0x00000000003FFFFFull; // The value here will yield the appropriate nibble for accessing the PowerBus @@ -136,12 +136,12 @@ p9_pm_set_homer_bar( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_targe fapi2::P9_PM_SET_HOMER_BAR_SIZE_INVALID().set_MEM_BAR(i_mem_bar) .set_MEM_SIZE(i_mem_size), "ERROR:HOMER Size is 0 but BAR is non-zero:0x%16llx", i_mem_bar); - // check that bar address passed in 1MB aligned(eg bits 44:63 are zero) + // check that bar address passed in 4MB aligned(eg bits 44:63 are zero) - region_masked_address = i_mem_bar & BAR_MASK_MB_ALIGN; - FAPI_ASSERT(!(region_masked_address != 0), - fapi2::P9_PM_SET_HOMER_BAR_NOT_1MB_ALIGNED().set_MEM_BAR(i_mem_bar), - "ERROR: i_mem_bar:0x%16llx is not 1MB aligned ", i_mem_bar); + region_masked_address = i_mem_bar & BAR_MASK_4MB_ALIGN; + FAPI_ASSERT((region_masked_address == 0), + fapi2::P9_PM_SET_HOMER_BAR_NOT_4MB_ALIGNED().set_MEM_BAR(i_mem_bar), + "ERROR: i_mem_bar:0x%16llx is not 4MB aligned ", i_mem_bar); FAPI_DBG("Calling pba_bar_config with BAR %x Addr: 0x%16llX Size: 0x%16llX", PBA_BAR0, i_mem_bar, i_mem_size); |
