diff options
| author | Prasad Bg Ranganath <prasadbgr@in.ibm.com> | 2017-10-23 08:12:25 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-12-21 00:35:40 -0500 |
| commit | c77b6c1a8839b0c0733960fd16e65f73ce195e22 (patch) | |
| tree | a0408e15102ddab3417e48293a9326c6ba967ad6 /src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.H | |
| parent | 59c08f9154744e3d9c69763ced88a18d12ff597c (diff) | |
| download | talos-hostboot-c77b6c1a8839b0c0733960fd16e65f73ce195e22.tar.gz talos-hostboot-c77b6c1a8839b0c0733960fd16e65f73ce195e22.zip | |
p9_pm_reset: check safe mode and, if not, move to Psafe manually
Key_Cronus_Test=PM_REGRESS
RTC:180824
Change-Id: I27e56b33ba8774e955afc289b392fa421faae9f7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48684
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48687
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.H')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.H | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.H index 5bc56ab65..5bfc20324 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.H +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.H @@ -80,6 +80,16 @@ extern "C" fapi2::ReturnCode p9_pm_reset( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, void* i_pHomerImage); + +//------------------------------------------------------------------------------ +/// +/// @brief PSAFE values update of DPLL and External voltage +/// +/// @param[in] i_target Proc Chip target +/// +/// @return FAPI2_RC_SUCCESS on success, else error code. + fapi2::ReturnCode p9_pm_reset_psafe_update + (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target); } #endif // _P9_PM_RESET_H |
