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author | Greg Still <stillgs@us.ibm.com> | 2016-04-22 07:10:46 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-06-16 11:54:37 -0400 |
commit | cdcf7015cf0c0e8036709443cb855987fd97b007 (patch) | |
tree | 7fe8ae41d7cfaaa20333e1900d3f3ae888c8d079 /src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_control.mk | |
parent | 73a4cf6eb75c38690eb4dda6ffcbb060849829cc (diff) | |
download | talos-hostboot-cdcf7015cf0c0e8036709443cb855987fd97b007.tar.gz talos-hostboot-cdcf7015cf0c0e8036709443cb855987fd97b007.zip |
p9_pm_occ_control Fix OCC memory boot launching
- Build and push launcher instructions into OCC SRAM
- Set SRAM Boot Vector 3 (FFFF_FFFC) to branch to launcher
- Per OCC team, offset is HOMER+0x40
Change-Id: I64074e6696201d0cfca57dbfabfdc5456e5303f7
Original-Change-Id: I2abbfea8de7b18d6010ee336031d0867cf9f0e99
RTC: 150818
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23561
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Sangeetha T S <sangeet2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25904
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_control.mk')
0 files changed, 0 insertions, 0 deletions