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author | Prasad Bg Ranganath <prasadbgr@in.ibm.com> | 2017-11-09 05:50:18 -0600 |
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committer | William G. Hoffa <wghoffa@us.ibm.com> | 2017-11-17 12:53:02 -0500 |
commit | 5b86ae89fcd99c36516ec9bd8a597bdcf1a1ca1e (patch) | |
tree | e12c2a225827189e5f8185ccee4a9dbffec97131 /src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C | |
parent | 1f14c2229e43a6d3676860e4322483b5b6625a78 (diff) | |
download | talos-hostboot-5b86ae89fcd99c36516ec9bd8a597bdcf1a1ca1e.tar.gz talos-hostboot-5b86ae89fcd99c36516ec9bd8a597bdcf1a1ca1e.zip |
Fix bug in cache query state procedure
Change-Id: Ic4869b2d73e90bd213c229fc83b189cb10ad57b6
CQ:SW407497
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49476
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49585
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C | 39 |
1 files changed, 30 insertions, 9 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C index d6b7f3b2b..97835fe80 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_cme_firinit.C @@ -240,10 +240,23 @@ fapi2::ReturnCode pm_cme_fir_reset( //query_cache_state to safely determine if we can scom //the ex targets fapi2::ReturnCode l_rc; - bool l_l2_is_scanable = false; - bool l_l3_is_scanable = false; - bool l_l2_is_scomable = false; - bool l_l3_is_scomable = false; + bool l_l2_is_scanable[MAX_L2_PER_QUAD]; + bool l_l2_is_scomable[MAX_L2_PER_QUAD]; + bool l_l3_is_scanable[MAX_L3_PER_QUAD]; + bool l_l3_is_scomable[MAX_L3_PER_QUAD]; + + for (auto cnt = 0; cnt < MAX_L2_PER_QUAD; ++cnt) + { + l_l2_is_scomable[cnt] = false; + l_l2_is_scanable[cnt] = false; + } + + for (auto cnt = 0; cnt < MAX_L3_PER_QUAD; ++cnt) + { + l_l3_is_scanable[cnt] = false; + l_l3_is_scomable[cnt] = false; + } + uint8_t l_chip_unit_pos; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, @@ -256,17 +269,25 @@ fapi2::ReturnCode pm_cme_fir_reset( FAPI_TRY(l_rc, "ERROR: failed to query cache access state for EQ %d", l_chip_unit_pos); - //If this cache isnt scommable continue to the next EQ - if(!l_l3_is_scomable) - { - continue; - } auto l_exChiplets = l_eq_chplt.getChildren<fapi2::TARGET_TYPE_EX> (fapi2::TARGET_STATE_FUNCTIONAL); for(auto l_ex_chplt : l_exChiplets) { + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, + l_ex_chplt, l_chip_unit_pos), + "ERROR: Failed to get the chip unit pos attribute from the ex"); + + //look ex is scommable + l_chip_unit_pos = l_chip_unit_pos % 2; + + if ((!(l_l2_is_scomable[l_chip_unit_pos]) && + !(l_l3_is_scomable[l_chip_unit_pos]))) + { + continue; + } + p9pmFIR::PMFir <p9pmFIR::FIRTYPE_CME_LFIR> l_cmeFir(l_ex_chplt); if (l_firinit_done_flag == 1) |