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author | Prem Shanker Jha <premjha2@in.ibm.com> | 2016-01-28 07:54:55 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-03-21 10:53:01 -0400 |
commit | 60685e0878ee18e61616c4c10162f746e38f7933 (patch) | |
tree | c8264831e159bac5c80733776b9bc026c6ca0599 /src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H | |
parent | fb9ba37e882c15425e9db071b60aefe5fdda083e (diff) | |
download | talos-hostboot-60685e0878ee18e61616c4c10162f746e38f7933.tar.gz talos-hostboot-60685e0878ee18e61616c4c10162f746e38f7933.zip |
PM: Added hcode image build support for SGPE and CME.
In this commit, nested xip structure of hardware image is traversed and hcode
for following platform is copied to to relevant area in HOMER:
- SGPE
- CME
- P9 Self Restore code
RTC: 145583
Change-Id: I5127ab5d4e498e1b2db9ae8bcefef933be961855
Original-Change-Id: I8f91e34aff81b4c9218be5a380e3336913cbd7c9
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/10675
Tested-by: Jenkins Server
Tested-by: Auto Mirror
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Tested-by: Hostboot CI
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22229
Tested-by: FSP CI Jenkins
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H | 166 |
1 files changed, 98 insertions, 68 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H index 0461f6090..dda135247 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H +++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H @@ -28,8 +28,8 @@ /// *HWP HWP Owner: Greg Still <stillgs@us.ibm.com> /// *HWP FW Owner: Prem S Jha <premjha2@in.ibm.com> /// *HWP Team: PM -/// *HWP Level: 1 -/// *HWP Consumed by: Hostboot, Phyp +/// *HWP Level: 2 +/// *HWP Consumed by: Hostboot:Phyp // //-------------------------------------------------------------------------- @@ -37,76 +37,106 @@ //-------------------------------------------------------------------------- #include <fapi2.H> -typedef const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > CONST_FAPI2_PROC; - -/** - * @brief phases of system associated for hcode image build. - */ -enum SysPhase_t +extern "C" { - PHASE_NA = 0, - PHASE_IPL = 1, - PHASE_REBUILD = 2 -}; + typedef const fapi2::Target< fapi2::TARGET_TYPE_PROC_CHIP > CONST_FAPI2_PROC; -/** - * @brief constants used for hcode image build. - */ -enum -{ - HW_IMG_RING_SIZE = 1024 * 1024, -}; + /** + * @brief phases of system associated for hcode image build. + */ + enum SysPhase_t + { + PHASE_NA = 0, + PHASE_IPL = 1, + PHASE_REBUILD = 2, + PHASE_END = 3, + }; -/** - * @brief image types to be handled by the hcode image build HWP. - * @note structure below summarizes all the components that needs to be - * included during STOP image build. Setting a field to 1 means that - * it needs to be part of STOP image in HOMER. It can be used to - * build partial STOP image in HOMER. - */ -struct ImageType_t -{ - uint32_t sresetHndlrBuild: 1; // for sreset handler inclusion - uint32_t threadLauncherBuild: 1; //for thread launcher inclusion - uint32_t cmeHcodeBuild: 1; // for cme hcode inclusion - uint32_t cmeCommonRingBuild: 1; // for core ring inclusion - uint32_t cmeCoreSpecificRingBuild: 1; // for core specific scan ring inclusion - uint32_t sgpeHcodeBuild: 1; // for sgpe inclusion - uint32_t sgpeCommonRingBuild: 1; // for sgpe common scan ring inclusion - uint32_t sgpeCacheSpecificRingBuild: 1; // for cache specific ring inclusion - uint32_t pgpeImageBuild: 1; // pgpe platform inclusion in image build - uint32_t pgpePstateParmBlockBuild: 1; //pgpe P-State Parameter Block Build - uint32_t reserve: 22; + /** + * @brief constants used for hcode image build. + */ + enum + { + HW_IMG_RING_SIZE = 1024 * 1024, + }; - ImageType_t( ) + /** + * @brief image types to be handled by the hcode image build HWP. + * @note structure below summarizes all the components that needs to be + * included during STOP image build. Setting a field to 1 means that + * it needs to be part of STOP image in HOMER. It can be used to + * build partial STOP image in HOMER. + */ + struct ImageType_t { - memset( this , 0, sizeof (*this) ); - this->sresetHndlrBuild |= 0x01; - this->threadLauncherBuild |= 0x01; - this->cmeHcodeBuild |= 0x01; - this->cmeCommonRingBuild |= 0x01; - this->cmeCoreSpecificRingBuild |= 0x01; - this->sgpeHcodeBuild |= 0x01; - this->sgpeCommonRingBuild |= 0x01; - this->sgpeCacheSpecificRingBuild |= 0x01; - this->pgpeImageBuild |= 0x01; - this->pgpePstateParmBlockBuild |= 0x01; - } -}; + uint32_t selfRestoreBuild: 1; // for self restore code inclusion + uint32_t cmeHcodeBuild: 1; // for cme hcode inclusion + uint32_t cmeCommonRingBuild: 1; // for core ring inclusion + uint32_t cmeCoreSpecificRingBuild: 1; // for core specific scan ring inclusion + uint32_t sgpeHcodeBuild: 1; // for sgpe inclusion + uint32_t sgpeCommonRingBuild: 1; // for sgpe common scan ring inclusion + uint32_t sgpeCacheSpecificRingBuild: 1; // for cache specific ring inclusion + uint32_t pgpeImageBuild: 1; // pgpe platform inclusion in image build + uint32_t pgpePstateParmBlockBuild: 1; //pgpe P-State Parameter Block Build + uint32_t reserve: 23; + + ImageType_t( ) + { + memset( this , 0, sizeof (*this) ); + this->selfRestoreBuild |= 0x01; + this->cmeHcodeBuild |= 0x01; + this->cmeCommonRingBuild |= 0x01; + this->cmeCoreSpecificRingBuild |= 0x01; + this->sgpeHcodeBuild |= 0x01; + this->sgpeCommonRingBuild |= 0x01; + this->sgpeCacheSpecificRingBuild |= 0x01; + this->pgpeImageBuild |= 0x01; + this->pgpePstateParmBlockBuild |= 0x01; + } + + bool isBuildValid() + { + bool buildValid = false; + + if ( ( this->selfRestoreBuild ) || + ( this->cmeHcodeBuild ) || + ( this->cmeCommonRingBuild ) || + ( this->cmeCoreSpecificRingBuild ) || + ( this->sgpeHcodeBuild ) || + ( this->sgpeCommonRingBuild ) || + ( this->sgpeCacheSpecificRingBuild ) || + ( this->pgpeImageBuild ) || + ( this->pgpePstateParmBlockBuild ) ) + { + buildValid = true; + } + + return buildValid; + } + }; + + typedef fapi2::ReturnCode( *p9_hcode_image_build_FP_t ) + ( CONST_FAPI2_PROC& i_procTgt, + void* const i_pImageIn, + void* o_pImageOut, + SysPhase_t i_phase, + ImageType_t i_imgType, + void* i_pBuf ); -/** - * @brief builds a STOP image using a refrence image as input. - * @param i_procTgt fapi2 target for processor chip. - * @param i_pImageIn points to memory mapped refrence image in PNOR. - * @param o_pImageOut points to a buffer where STOP image is built. - * @param i_phase phase of the system i.e. IPL or Hypervisor/rebuild mode. - * @param i_pBuf buffer of size >= HW_IMG_RING_SIZE for handling ring. - * @note needs attribute ATTR_EC - */ -fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt, - void* const i_pImageIn, - void* o_pImageOut, - SysPhase_t i_phase, - ImageType_t i_imgType, - void* i_pBuf ); + /** + * @brief builds a STOP image using a refrence image as input. + * @param i_procTgt fapi2 target for processor chip. + * @param i_pImageIn points to memory mapped refrence image in PNOR. + * @param o_pImageOut pointer to the beginning of the HOMER image buffer. + * @param i_phase phase of the system i.e. IPL or Hypervisor/rebuild mode. + * @param i_pBuf buffer of size >= HW_IMG_RING_SIZE for handling ring. + * @note needs attribute ATTR_EC + */ + fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt, + void* const i_pImageIn, + void* o_pImageOut, + SysPhase_t i_phase, + ImageType_t i_imgType, + void* i_pBuf ); +} // extern C #endif //__HCODE_IMG_BUILD_H_ |