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| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2016-07-21 11:02:29 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-11-15 23:41:46 -0500 |
| commit | 3c4936bcc01d3060aa5656cea03970bbb00f6371 (patch) | |
| tree | 2f43813a0e2c2f92bad2fb8fa9d51e1779852af6 /src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H | |
| parent | 65c1a0cb72f7daa85a7e5d37dce6c27cbf2042d7 (diff) | |
| download | talos-hostboot-3c4936bcc01d3060aa5656cea03970bbb00f6371.tar.gz talos-hostboot-3c4936bcc01d3060aa5656cea03970bbb00f6371.zip | |
PM: Customization of CME and SGPE rings in HOMER.
- Extracts rings from hardware image and VPD and stashes in to
a temp buffer using HWP p9_xip_customize. Subsequently, using
TOR API creates a fresh and leaner layout of scan rings in
HOMER.
- Implements a debug infrastructure to verify the scan ring layout
in HOMER.
- Implemented scan ring overrides for core common and cache common
rings.
- Introduces size check for various sections of HOMER.
Change-Id: I8d7785f632823c31077bd4f320c453129be4ef0c
RTC:157954
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27697
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Dev-Ready: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27699
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H index 7b2e48046..076f33cf6 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H +++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.H @@ -42,6 +42,7 @@ // Includes //-------------------------------------------------------------------------- #include <fapi2.H> +#include <p9_infrastruct_help.H> extern "C" { @@ -63,7 +64,8 @@ extern "C" */ enum { - HW_IMG_RING_SIZE = 1024 * 1024, + HW_IMG_RING_SIZE = MAX_SEEPROM_IMAGE_SIZE, + WORK_BUF_SIZE = MAX_RING_BUF_SIZE, }; /** @@ -131,7 +133,9 @@ extern "C" void* const i_pBuf1, const uint32_t i_sizeBuf1, void* const i_pBuf2, - const uint32_t i_sizeBuf2 ); + const uint32_t i_sizeBuf2, + void* const i_pBuf3, + const uint32_t i_sizeBuf3 ); /** * @brief builds a STOP image using a refrence image as input. @@ -143,8 +147,10 @@ extern "C" * @param i_imgType image type to be built. * @param i_pBuf1 pointer to a work buffer1. * @param i_sizeBuf1 size of work buffer1. Minimum size expected HW_IMG_RING_SIZE. - * @param i_pBuf2 pointer to a work buffer2. Minimum size expected HW_IMG_RING_SIZE. + * @param i_pBuf2 pointer to a work buffer2. Minimum size expected WORK_BUF_SIZE. * @param i_sizeBuf2 size of work buffer2 + * @param i_pBuf3 pointer to a work buffer2. Minimum size expected WORK_BUF_SIZE. + * @param i_sizeBuf3 size of work buffer2 * @note needs attribute ATTR_EC */ fapi2::ReturnCode p9_hcode_image_build( CONST_FAPI2_PROC& i_procTgt, @@ -156,7 +162,8 @@ extern "C" void* const i_pBuf1, const uint32_t i_sizeBuf1, void* const i_pBuf2, - const uint32_t i_sizeBuf2 - ); + const uint32_t i_sizeBuf2, + void* const i_pBuf3, + const uint32_t i_sizeBuf3 ); } // extern C #endif //__HCODE_IMG_BUILD_H_ |
