diff options
| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2017-09-07 07:59:06 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-09-18 12:13:11 -0400 |
| commit | 00ae3d8dacde1943ca690bac9a4bd52790c23ede (patch) | |
| tree | 78eca6bd20e9aa65e46cf41dd553d4d43eba0530 /src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C | |
| parent | 9a09b432d6a87f6c4b29df893a2649ee607d4241 (diff) | |
| download | talos-hostboot-00ae3d8dacde1943ca690bac9a4bd52790c23ede.tar.gz talos-hostboot-00ae3d8dacde1943ca690bac9a4bd52790c23ede.zip | |
UAV: Fixed handling of NV Links while generating unit availability vector.
commit corrects handling of NV link position. HWP assumed 1:1 mapping
between obus brick position and NV Link position. It fixes the mapping.
Change-Id: I2c0799d7c873d882ecedad3814f7c2908c91d877
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45781
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45807
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C | 58 |
1 files changed, 48 insertions, 10 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C b/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C index 7d5ffdedd..c7ec40ecf 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_check_proc_config.C @@ -63,14 +63,21 @@ enum */ enum { - MCS_POS = 1, - MBA_POS = 9, - MEM_BUF_POS = 17, - XBUS_POS = 25, - PHB_POS = 30, - CAPP_POS = 37, - OBUS_POS = 41, - NVLINK_POS = 45, + MCS_POS = 1, + MBA_POS = 9, + MEM_BUF_POS = 17, + XBUS_POS = 25, + PHB_POS = 30, + CAPP_POS = 37, + OBUS_POS = 41, + NVLINK_POS = 45, + OBUS_BRICK_0_POS = 0, + OBUS_BRICK_1_POS = 1, + OBUS_BRICK_2_POS = 2, + OBUS_BRICK_9_POS = 9, + OBUS_BRICK_10_POS = 10, + OBUS_BRICK_11_POS = 11, + }; /** @@ -208,12 +215,43 @@ fapi2::ReturnCode checkObusChipletHierarchy( CONST_FAPI2_PROC& i_procTgt, FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_obusBrick, l_brickPos ), "Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)" ); - l_brickBitPos = l_brickPos + i_nvLinkPos; + switch( l_brickPos ) + { + case OBUS_BRICK_0_POS: + case OBUS_BRICK_1_POS: + case OBUS_BRICK_2_POS: + + l_brickBitPos = l_brickPos + i_nvLinkPos; + + break; + + case OBUS_BRICK_9_POS: + l_brickBitPos = i_nvLinkPos + 3; + break; + + case OBUS_BRICK_10_POS: + l_brickBitPos = i_nvLinkPos + 4; + break; + + case OBUS_BRICK_11_POS: + l_brickBitPos = i_nvLinkPos + 5; + break; + + default: + + FAPI_ASSERT_NOEXIT( ( false ), + fapi2::BAD_OBUS_BRICK_POSITION() + .set_TARGET( l_obusBrick ) + .set_OBRICK_POS( l_brickPos ), + "Bad or unexpected Obus brick position" ); + + } + io_configVector |= l_tempVector >> l_brickBitPos; #ifndef __HOSTBOOT_MODULE - FAPI_INF( "NV Link Pos %02d Bit Pos 0x%02x (%d) UAV 0x%016lx", + FAPI_INF( "OBus Brick Pos %02d Bit Pos 0x%02x (%d) UAV 0x%016lx", l_brickPos, l_brickBitPos, l_brickBitPos, io_configVector ); #endif |
