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authorCHRISTINA L. GRAVES <clgraves@us.ibm.com>2016-05-20 18:42:39 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2019-02-12 16:43:50 -0600
commitb455f921905d14d1babb1ebc2d32eec823f5bda0 (patch)
treed8fff9e97e8d520567c39fe34c5476d2b7bbe662 /src/import/chips/p9/procedures/hwp/perv
parent166a4cb6fa7b62cf72694a9f90c7aa49d24fe9c8 (diff)
downloadtalos-hostboot-b455f921905d14d1babb1ebc2d32eec823f5bda0.tar.gz
talos-hostboot-b455f921905d14d1babb1ebc2d32eec823f5bda0.zip
Adding in LPC functional reset to sbe_lpc_init
Change-Id: I2343dcaad657640258bcdf7954a9b5702a1061aa Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24885 Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71473 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv')
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C11
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H2
2 files changed, 6 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C
index 698d79691..e5ca81c0d 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.C
@@ -40,7 +40,7 @@
#include "p9_sbe_lpc_init.H"
#include "p9_perv_scom_addresses.H"
-
+#include "p9_perv_scom_addresses_fld.H"
fapi2::ReturnCode p9_sbe_lpc_init(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
@@ -48,9 +48,6 @@ fapi2::ReturnCode p9_sbe_lpc_init(const
fapi2::buffer<uint64_t> l_data64;
FAPI_DBG("Entering ...");
- //activate LPCM reset input
- //TODO: ADU register address TBD
-
// set LPC clock mux select to internal clock
//Setting CPLT_CTRL0 register value
l_data64.flush<0>();
@@ -63,8 +60,10 @@ fapi2::ReturnCode p9_sbe_lpc_init(const
l_data64.setBit<1>(); //PERV.CPLT_CTRL0.TC_UNIT_SYNCCLK_MUXSEL_DC = 0
FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TP_CPLT_CTRL0_CLEAR, l_data64));
- //de-activate LPCM reset input
- //TODO: ADU register address TBD
+ //Settting registers to do an LPC functional reset
+ l_data64.flush<0>().setBit<CPLT_CONF1_TC_LP_RESET>();
+ FAPI_TRY(fapi2::putScom(i_target_chip, PERV_N3_CPLT_CONF1_OR, l_data64));
+ FAPI_TRY(fapi2::putScom(i_target_chip, PERV_N3_CPLT_CONF1_CLEAR, l_data64));
FAPI_DBG("Exiting ...");
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H
index b32de316d..d201e586e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_lpc_init.H
@@ -39,7 +39,6 @@
#ifndef _P9_SBE_LPC_INIT_H_
#define _P9_SBE_LPC_INIT_H_
-
#include <fapi2.H>
@@ -52,6 +51,7 @@ typedef fapi2::ReturnCode (*p9_sbe_lpc_init_FP_t)(const
/// @return FAPI2_RC_SUCCESS if success, else error code.
extern "C"
{
+ const uint32_t CPLT_CONF1_TC_LP_RESET = 12;
fapi2::ReturnCode p9_sbe_lpc_init(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip);
}
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