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| author | Stephen Glancy <sglancy@us.ibm.com> | 2017-02-21 13:05:39 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-01 13:20:52 -0500 |
| commit | aba5dad89d16464fbf1a9228f5c44c5972e9d070 (patch) | |
| tree | 65295a0c902e441aa08d2e6b919e0446c5fb922f /src/import/chips/p9/procedures/hwp/perv | |
| parent | 98d40a971e051f00688086a2b1b990ab4dab31af (diff) | |
| download | talos-hostboot-aba5dad89d16464fbf1a9228f5c44c5972e9d070.tar.gz talos-hostboot-aba5dad89d16464fbf1a9228f5c44c5972e9d070.zip | |
Updates to run HW VREF cal by default
This code runs the HW VREF calibrations (both WR and RD VREF)
by default if it is supported by the HW. Four new attributes are
added to handle whether HW VREF cal should be run and with what overrides
it needs to be run.
Change-Id: I3ed63794e955ee8c94cffce0b98dba58886e4a9d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36803
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: RYAN P. KING <rpking@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36807
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_getecid.C | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C index ed66eb025..df5f140ba 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C @@ -118,6 +118,8 @@ static fapi2::ReturnCode setup_memory_work_around_attributes( uint8_t l_value = 1; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_MSS_WR_VREF, i_target, l_value) ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_MSS_VREF_DAC, i_target, l_value) ); + // The value for this is SKIP - we want to skip in sub DD1.02 HW + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_SKIP_HW_VREF_CAL, i_target, l_value) ); } // Workarounds for modules which are before 1.03 (memory part 2) @@ -129,6 +131,8 @@ static fapi2::ReturnCode setup_memory_work_around_attributes( uint8_t l_value = 1; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_MSS_TRAINING_BAD_BITS, i_target, l_value) ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_BLUE_WATERFALL_ADJUST, i_target, l_value) ); + // The value for this is SKIP - we want to skip in sub DD1.03 HW + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_SKIP_RD_VREF_VREFSENSE_OVERRIDE, i_target, l_value) ); } return fapi2::FAPI2_RC_SUCCESS; |
