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| author | Ben Gass <bgass@us.ibm.com> | 2016-09-15 14:11:53 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-09-24 15:39:48 -0400 |
| commit | 441e3f07dd12e491efc0b586501598e8989f7cb1 (patch) | |
| tree | 456d609e0d01dc855a896582a3d3b3cd789ee3d4 /src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C | |
| parent | c6aa1b00f9ee7a7241e4231e559c42cec1154ef9 (diff) | |
| download | talos-hostboot-441e3f07dd12e491efc0b586501598e8989f7cb1.tar.gz talos-hostboot-441e3f07dd12e491efc0b586501598e8989f7cb1.zip | |
Header file updates based on 9067 figtree
Associated changes based on constant name changes.
Add wregister part_decl and access fields.
Change-Id: I74810bb75430981bfcc0d964823fe249866a1dcf
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29797
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Yang Fan Liu <shliuyf@cn.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29803
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C index ac5250d07..244c0490f 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_ram_core.C @@ -119,7 +119,6 @@ const uint32_t C_RAM_CTRL_INSTRUCTION_LEN = 32; const uint32_t C_RAM_STATUS_ACCESS_DURING_RECOVERY = 0; const uint32_t C_RAM_STATUS_COMPLETION = 1; const uint32_t C_RAM_STATUS_EXCEPTION = 2; -const uint32_t C_RAM_STATUS_LSU_EMPTY = 3; //----------------------------------------------------------------------------------- // Function definitions @@ -198,7 +197,7 @@ fapi2::ReturnCode RamCore::ram_setup() FAPI_TRY(fapi2::putScom(iv_target, C_SPR_MODE, l_data)); l_data.flush<0>(); FAPI_TRY(fapi2::getScom(iv_target, C_SCOMC, l_data)); - l_data.insertFromRight<C_SCOMC_MODE, C_SCOMC_MODE_LEN>(0); + l_data.insertFromRight<C_SCOMC_MODE_CX, C_SCOMC_MODE_CX_LEN>(0); FAPI_TRY(fapi2::putScom(iv_target, C_SCOMC, l_data)); //2.create mtsprd<gpr0> opcode, ram into thread to get GPR0 @@ -248,7 +247,7 @@ fapi2::ReturnCode RamCore::ram_cleanup() FAPI_TRY(fapi2::putScom(iv_target, C_SPR_MODE, l_data)); l_data.flush<0>(); FAPI_TRY(fapi2::getScom(iv_target, C_SCOMC, l_data)); - l_data.insertFromRight<C_SCOMC_MODE, C_SCOMC_MODE_LEN>(0); + l_data.insertFromRight<C_SCOMC_MODE_CX, C_SCOMC_MODE_CX_LEN>(0); FAPI_TRY(fapi2::putScom(iv_target, C_SCOMC, l_data)); // restore GPR1 |
