summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/hwp/nest
diff options
context:
space:
mode:
authorJoe McGill <jmcgill@us.ibm.com>2016-09-08 07:41:04 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2016-09-15 16:24:44 -0400
commitae742fbc7622f37d42bd892dac67115b85fcf071 (patch)
tree2e19b1e3f3196d66f61ae718c702c4fb78f7e27f /src/import/chips/p9/procedures/hwp/nest
parentebc364d677fd22afb4e81a6e4a015de423e526be (diff)
downloadtalos-hostboot-ae742fbc7622f37d42bd892dac67115b85fcf071.tar.gz
talos-hostboot-ae742fbc7622f37d42bd892dac67115b85fcf071.zip
nest HWP updates for partial good MC, FBC chip_as_group
p9_revert_sbe_mcs_setup respect MCS region fence in register programming p9_build_smp p9_fbc_eff_config_links treat X link ID as group ID in chip_as_group pump mode Change-Id: I70d71b0ee5dd625c18234b913053460645d487cf Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29375 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29397 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C20
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config_links.C11
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_revert_sbe_mcs_setup.C75
3 files changed, 75 insertions, 31 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C
index aceb0fb10..987467d4a 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C
@@ -392,11 +392,17 @@ p9_build_smp_check_topology(p9_build_smp_system& i_smp)
// 1) in a given group, all chips are connected to every other
// chip in the group, by an X bus
// 2) each chip is connected to its partner chip (with same chip id)
- // in every other group, by an A bus
+ // in every other group, by an A bus (or X bus if pump mode = chip_is_group)
+ fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
+ fapi2::ATTR_PROC_FABRIC_PUMP_MODE_Type l_pump_mode;
fapi2::buffer<uint8_t> l_group_ids_in_system;
fapi2::buffer<uint8_t> l_chip_ids_in_groups;
+ // determine pump mode
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_PUMP_MODE, FAPI_SYSTEM, l_pump_mode),
+ "Error from FAPI_ATTR_GET (ATTR_PROC_FABRIC_PUMP_MODE");
+
// build set of all valid group IDs in system
for (auto g_iter = i_smp.groups.begin();
g_iter != i_smp.groups.end();
@@ -457,8 +463,16 @@ p9_build_smp_check_topology(p9_build_smp_system& i_smp)
{
if (l_x_en[l_link_id])
{
- FAPI_TRY(l_connected_chip_ids.setBit(l_x_rem_chip_id[l_link_id]),
- "Error from setBit (l_connected_chip_ids, X)");
+ if (l_pump_mode == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_NODE)
+ {
+ FAPI_TRY(l_connected_chip_ids.setBit(l_x_rem_chip_id[l_link_id]),
+ "Error from setBit (l_connected_chip_ids, X)");
+ }
+ else
+ {
+ FAPI_TRY(l_connected_group_ids.setBit(l_x_rem_chip_id[l_link_id]),
+ "Error from setBit (l_connected_group_ids, X)");
+ }
}
}
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config_links.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config_links.C
index 4993bb3c5..de32dcabe 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config_links.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config_links.C
@@ -275,6 +275,10 @@ p9_fbc_eff_config_links(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_tar
uint8_t l_a_rem_link_id[P9_FBC_UTILS_MAX_A_LINKS] = { 0 };
uint8_t l_a_rem_fbc_group_id[P9_FBC_UTILS_MAX_A_LINKS] = { 0 };
+ // atttribute defining X link pump mode
+ fapi2::ATTR_PROC_FABRIC_PUMP_MODE_Type l_pump_mode;
+ fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
+
// seed arrays with previously written attribute state
if (i_op == SMP_ACTIVATE_PHASE2)
{
@@ -301,6 +305,8 @@ p9_fbc_eff_config_links(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_tar
"Error from p9_fbc_utils_get_chip_id_attr");
FAPI_TRY(p9_fbc_utils_get_group_id_attr(i_target, l_loc_fbc_group_id),
"Error from p9_fbc_utils_get_group_id_attr");
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_PUMP_MODE, FAPI_SYSTEM, l_pump_mode),
+ "Error from FAPI_ATTR_GET (ATTR_PROC_FABRIC_PUMP_MODE");
if (i_process_electrical)
{
@@ -317,7 +323,7 @@ p9_fbc_eff_config_links(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_tar
l_loc_fbc_group_id,
P9_FBC_XBUS_LINK_CTL_ARR,
P9_FBC_UTILS_MAX_X_LINKS,
- true,
+ (l_pump_mode == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_NODE),
l_x_en,
l_x_rem_link_id,
l_x_rem_fbc_chip_id),
@@ -334,7 +340,6 @@ p9_fbc_eff_config_links(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_tar
// - if configured for X link use, fill in logical X link attributes
// - if configured for A link use, fill in logical A link attributes
fapi2::ATTR_PROC_FABRIC_SMP_OPTICS_MODE_Type l_smp_optics_mode;
- fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_SMP_OPTICS_MODE, FAPI_SYSTEM, l_smp_optics_mode),
"Error from FAPI_ATTR_GET (ATTR_PROC_FABRIC_SMP_OPTICS_MODE)");
@@ -350,7 +355,7 @@ p9_fbc_eff_config_links(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_tar
l_loc_fbc_group_id,
P9_FBC_XBUS_LINK_CTL_ARR,
P9_FBC_UTILS_MAX_X_LINKS,
- true,
+ (l_pump_mode == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_NODE),
l_x_en,
l_x_rem_link_id,
l_x_rem_fbc_chip_id),
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_revert_sbe_mcs_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_revert_sbe_mcs_setup.C
index 5f97d14a7..f153b6dd2 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_revert_sbe_mcs_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_revert_sbe_mcs_setup.C
@@ -42,6 +42,7 @@
// Includes
//------------------------------------------------------------------------------
#include <p9_revert_sbe_mcs_setup.H>
+#include <p9_perv_scom_addresses.H>
#include <p9_mc_scom_addresses.H>
#include <p9_mc_scom_addresses_fld.H>
@@ -51,6 +52,23 @@
// MCS target type constants
const uint8_t NUM_MCS_TARGETS = 4;
+
+const uint64_t MCS_CPLT_CTRL1_ARR[NUM_MCS_TARGETS] =
+{
+ PERV_N3_CPLT_CTRL1,
+ PERV_N3_CPLT_CTRL1,
+ PERV_N1_CPLT_CTRL1,
+ PERV_N1_CPLT_CTRL1
+};
+
+const uint64_t MCS_CPLT_CTRL1_BIT_ARR[NUM_MCS_TARGETS] =
+{
+ 10,
+ 10,
+ 9,
+ 9
+};
+
const uint64_t MCS_MCFGP_ARR[NUM_MCS_TARGETS] =
{
MCS_0_MCFGP,
@@ -85,35 +103,42 @@ revert_mcs_hb_dcbz_config(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_t
const uint8_t i_mcs)
{
FAPI_DBG("Start");
+ fapi2::buffer<uint64_t> l_cplt_ctrl1;
fapi2::buffer<uint64_t> l_mcfgp;
fapi2::buffer<uint64_t> l_mcmode1;
fapi2::buffer<uint64_t> l_mcfirmask;
- // MCFGP -- mark BAR invalid & reset grouping configuration fields
- FAPI_TRY(fapi2::getScom(i_target, MCS_MCFGP_ARR[i_mcs], l_mcfgp),
- "Error from getScom (MCS%d_MCFGP)", i_mcs);
- l_mcfgp.clearBit<MCS_MCFGP_VALID>();
- l_mcfgp.clearBit<MCS_MCFGP_MC_CHANNELS_PER_GROUP,
- MCS_MCFGP_MC_CHANNELS_PER_GROUP_LEN>();
- l_mcfgp.clearBit<MCS_MCFGP_CHANNEL_0_GROUP_MEMBER_IDENTIFICATION,
- MCS_MCFGP_CHANNEL_0_GROUP_MEMBER_IDENTIFICATION_LEN>();
- l_mcfgp.clearBit<MCS_MCFGP_GROUP_SIZE, MCS_MCFGP_GROUP_SIZE_LEN>();
- FAPI_TRY(fapi2::putScom(i_target, MCS_MCFGP_ARR[i_mcs], l_mcfgp),
- "Error from putScom (MCS%d_MCFGP)", i_mcs);
-
- // MCMODE1 -- enable speculation
- FAPI_TRY(fapi2::getScom(i_target, MCS_MCMODE1_ARR[i_mcs], l_mcmode1),
- "Error from getScom (MCS%d_MCMODE1)", i_mcs);
- l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_ALL_SPEC_OPS>();
- l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_SPEC_OP,
- MCS_MCMODE1_DISABLE_SPEC_OP_LEN>();
- FAPI_TRY(fapi2::putScom(i_target, MCS_MCMODE1_ARR[i_mcs], l_mcmode1),
- "Error from putScom (MCS%d_MCMODE1)", i_mcs);
-
- // MCFIRMASK -- mask all errors
- l_mcfirmask.flush<1>();
- FAPI_TRY(fapi2::putScom(i_target, MCS_MCFIRMASK_OR_ARR[i_mcs], l_mcfirmask),
- "Error from putScom (MCS%d_MCFIRMASK_OR)", i_mcs);
+ FAPI_TRY(fapi2::getScom(i_target, MCS_CPLT_CTRL1_ARR[i_mcs], l_cplt_ctrl1),
+ "Error from getscom (CPLT_CTRL1)");
+
+ if (!l_cplt_ctrl1.getBit(MCS_CPLT_CTRL1_BIT_ARR[i_mcs]))
+ {
+ // MCFGP -- mark BAR invalid & reset grouping configuration fields
+ FAPI_TRY(fapi2::getScom(i_target, MCS_MCFGP_ARR[i_mcs], l_mcfgp),
+ "Error from getScom (MCS%d_MCFGP)", i_mcs);
+ l_mcfgp.clearBit<MCS_MCFGP_VALID>();
+ l_mcfgp.clearBit<MCS_MCFGP_MC_CHANNELS_PER_GROUP,
+ MCS_MCFGP_MC_CHANNELS_PER_GROUP_LEN>();
+ l_mcfgp.clearBit<MCS_MCFGP_CHANNEL_0_GROUP_MEMBER_IDENTIFICATION,
+ MCS_MCFGP_CHANNEL_0_GROUP_MEMBER_IDENTIFICATION_LEN>();
+ l_mcfgp.clearBit<MCS_MCFGP_GROUP_SIZE, MCS_MCFGP_GROUP_SIZE_LEN>();
+ FAPI_TRY(fapi2::putScom(i_target, MCS_MCFGP_ARR[i_mcs], l_mcfgp),
+ "Error from putScom (MCS%d_MCFGP)", i_mcs);
+
+ // MCMODE1 -- enable speculation
+ FAPI_TRY(fapi2::getScom(i_target, MCS_MCMODE1_ARR[i_mcs], l_mcmode1),
+ "Error from getScom (MCS%d_MCMODE1)", i_mcs);
+ l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_ALL_SPEC_OPS>();
+ l_mcmode1.clearBit<MCS_MCMODE1_DISABLE_SPEC_OP,
+ MCS_MCMODE1_DISABLE_SPEC_OP_LEN>();
+ FAPI_TRY(fapi2::putScom(i_target, MCS_MCMODE1_ARR[i_mcs], l_mcmode1),
+ "Error from putScom (MCS%d_MCMODE1)", i_mcs);
+
+ // MCFIRMASK -- mask all errors
+ l_mcfirmask.flush<1>();
+ FAPI_TRY(fapi2::putScom(i_target, MCS_MCFIRMASK_OR_ARR[i_mcs], l_mcfirmask),
+ "Error from putScom (MCS%d_MCFIRMASK_OR)", i_mcs);
+ }
fapi_try_exit:
FAPI_DBG("End");
OpenPOWER on IntegriCloud