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authorJoe McGill <jmcgill@us.ibm.com>2017-05-26 11:18:56 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-06-13 12:25:05 -0400
commit78f670a9ae0cfcf1aa3e005b7093c588dc5ceae5 (patch)
tree30655228f21fda73b901310d1d9bed7c137fa776 /src/import/chips/p9/procedures/hwp/nest
parent3e6b198841e23320fce9fc7af129ac537a852221 (diff)
downloadtalos-hostboot-78f670a9ae0cfcf1aa3e005b7093c588dc5ceae5.tar.gz
talos-hostboot-78f670a9ae0cfcf1aa3e005b7093c588dc5ceae5.zip
L3 updates -- shell HWPs
p9_abus_scominit p9_attr_update p9_exit_cache_contained p9_pcie_hotplug_control All HWPs are currently empty, and planned to be so to my knowledge Change-Id: If1210fd4fdbbaee6965beb70d2f6fac031d7c9d3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41051 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Peng Fei Gou <shgoupf@cn.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41055 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_attr_update.C21
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_attr_update.H18
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_exit_cache_contained.C55
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_exit_cache_contained.H33
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pcie_hotplug_control.C25
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_pcie_hotplug_control.H33
6 files changed, 91 insertions, 94 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_attr_update.C b/src/import/chips/p9/procedures/hwp/nest/p9_attr_update.C
index c503daf0d..891eb7413 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_attr_update.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_attr_update.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -24,22 +24,23 @@
/* IBM_PROLOG_END_TAG */
///
/// @file p9_attr_update.C
+/// @brief Stub HWP for FW to override attributes programmatically (FAPI2)
///
-/// @brief Stub HWP for FW to override attributes programmatically
+/// @author Joe McGill <jmcgill@us.ibm.com>
///
//
-// *HWP HW Owner : Michael Dye <dyem@us.ibm.com>
+// *HWP HW Owner : Joe McGill <jmcgill@us.ibm.com>
// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
// *HWP Team : Nest
-// *HWP Level : 2
+// *HWP Level : 3
// *HWP Consumed by : HB
//
//------------------------------------------------------------------------------
// Includes
//------------------------------------------------------------------------------
-#include "p9_attr_update.H"
+#include <p9_attr_update.H>
//------------------------------------------------------------------------------
// Function definitions
@@ -48,11 +49,7 @@
fapi2::ReturnCode
p9_attr_update(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
{
- FAPI_DBG("Entering ...");
-
- FAPI_DBG("Exiting ...");
-
-//fapi_try_exit:
- return fapi2::current_err;
-
+ FAPI_DBG("Start");
+ FAPI_DBG("End");
+ return fapi2::FAPI2_RC_SUCCESS;
}
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_attr_update.H b/src/import/chips/p9/procedures/hwp/nest/p9_attr_update.H
index 0fd319178..62308b027 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_attr_update.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_attr_update.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -24,19 +24,19 @@
/* IBM_PROLOG_END_TAG */
///
/// @file p9_attr_update.H
+/// @brief Stub HWP for FW to override attributes programmatically (FAPI2)
///
-/// @brief Stub HWP for FW to override attributes programmatically
+/// @author Joe McGill <jmcgill@us.ibm.com>
///
//
-// *HWP HW Owner : Michael Dye <dyem@us.ibm.com>
+// *HWP HW Owner : Joe McGill <jmcgill@us.ibm.com>
// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
// *HWP Team : Nest
-// *HWP Level : 1
+// *HWP Level : 3
// *HWP Consumed by : HB
//
-
#ifndef _P9_ATTR_UPDATE_H_
#define _P9_ATTR_UPDATE_H_
@@ -48,8 +48,8 @@
//------------------------------------------------------------------------------
// Structure definitions
//------------------------------------------------------------------------------
-
-typedef fapi2::ReturnCode (*p9_attr_update_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
+typedef fapi2::ReturnCode (*p9_attr_update_FP_t)(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
//------------------------------------------------------------------------------
// Function prototypes
@@ -58,11 +58,13 @@ typedef fapi2::ReturnCode (*p9_attr_update_FP_t)(const fapi2::Target<fapi2::TARG
extern "C"
{
+///
/// @brief Placeholder for attribute overrides
///
/// @param[in] i_target Reference to processor chip target
/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
- fapi2::ReturnCode p9_attr_update(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+ fapi2::ReturnCode p9_attr_update(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
} // extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_exit_cache_contained.C b/src/import/chips/p9/procedures/hwp/nest/p9_exit_cache_contained.C
index 8f6520afc..bc78b5324 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_exit_cache_contained.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_exit_cache_contained.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -22,50 +22,43 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-
-///----------------------------------------------------------------------------
+///
/// @file p9_exit_cache_contained.C
+/// @brief Placeholder to apply inits needed prior to HB expansion from L3
+/// cache to main memory (FAPI2)
+///
+/// @author Joe McGill <jmcgill@us.ibm.com>
///
-/// @brief Contains inits to be performed before Hostboot expanded from
-/// running inside the confines of the L3 cache out to main memory.
-///----------------------------------------------------------------------------
+//
// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
// *HWP Team: Nest
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: HB
-
+//
//------------------------------------------------------------------------------
// Includes
//------------------------------------------------------------------------------
#include <p9_exit_cache_contained.H>
-extern "C"
-{
-///
-/// p9_exit_cache_contained HWP entry point (Defined in .H file)
-///
- fapi2::ReturnCode p9_exit_cache_contained(const
- fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>
- & i_target)
- {
- fapi2::ReturnCode rc;
-
- // Mark Entry
- FAPI_INF("Entering ...");
- // This procedure is a placeholder to add inits that might need to be
- // performed before Hostboot expanded from running inside the confines
- // of the L3 cache out to main memory.
- // There is nothing specific to be added for P9 at this point.
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+fapi2::ReturnCode
+p9_exit_cache_contained(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+ // This procedure is a placeholder to add inits that might need to be
+ // performed before Hostboot expanded from running inside the confines
+ // of the L3 cache out to main memory.
+ // There is nothing specific to be added for P9 at this point.
- // Mark Exit
- FAPI_INF("Exiting ...");
+ FAPI_INF("Start");
+ FAPI_INF("End");
- return rc;
- }
-} // extern "C"
-/* End: */
+ return fapi2::FAPI2_RC_SUCCESS;
+}
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_exit_cache_contained.H b/src/import/chips/p9/procedures/hwp/nest/p9_exit_cache_contained.H
index f64921cc0..88414ad85 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_exit_cache_contained.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_exit_cache_contained.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -23,30 +23,37 @@
/* */
/* IBM_PROLOG_END_TAG */
///
-
-///----------------------------------------------------------------------------
/// @file p9_exit_cache_contained.H
+/// @brief Placeholder to apply inits needed prior to HB expansion from L3
+/// cache to main memory (FAPI2)
+///
+/// @author Joe McGill <jmcgill@us.ibm.com>
///
-/// @brief Contains inits to be performed before Hostboot expanded from
-/// running inside the confines of the L3 cache out to main memory.
-///----------------------------------------------------------------------------
+//
// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
// *HWP Team: Nest
-// *HWP Level: 2
+// *HWP Level: 3
// *HWP Consumed by: HB
+//
+///
#ifndef _PROC_EXIT_CACHE_CONTAINED_H_
#define _PROC_EXIT_CACHE_CONTAINED_H_
+
//------------------------------------------------------------------------------
// Includes
//------------------------------------------------------------------------------
-
#include <fapi2.H>
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
// Function pointer typedef definition for HWP call support
-typedef fapi2::ReturnCode (*p9_exit_cache_contained_FP_t)(fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
+typedef fapi2::ReturnCode (*p9_exit_cache_contained_FP_t)(
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
//------------------------------------------------------------------------------
// Function prototypes
@@ -54,19 +61,15 @@ typedef fapi2::ReturnCode (*p9_exit_cache_contained_FP_t)(fapi2::Target<fapi2::T
extern "C"
{
-//------------------------------------------------------------------------------
-// Hardware Procedure
-//------------------------------------------------------------------------------
///
/// @brief Placeholder for overrides needed to step the core from
/// cache-contained execution to expand to memory
///
/// @param[in] i_target Reference to processor chip target
-///
/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
///
- fapi2::ReturnCode p9_exit_cache_contained(const
- fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+ fapi2::ReturnCode p9_exit_cache_contained(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
} // extern "C"
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pcie_hotplug_control.C b/src/import/chips/p9/procedures/hwp/nest/p9_pcie_hotplug_control.C
index 30a9b5f0a..33e4961aa 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pcie_hotplug_control.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pcie_hotplug_control.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -26,25 +26,26 @@
/// @file p9_pcie_hotplug_control.C
/// @brief Manage slot power on hot-plug controlled slots (FAPI2)
///
-// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
+// *HWP HWP Owner: Joe McGill jmcgill@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
-// *HWP Level: 1
+// *HWP Level: 3
// *HWP Consumed by: HB
-//-----------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
// Includes
-//-----------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
#include <p9_pcie_hotplug_control.H>
-
-//-----------------------------------------------------------------------------------
+//------------------------------------------------------------------------------
// Function definitions
-//-----------------------------------------------------------------------------------
-fapi2::ReturnCode p9_pcie_hotplug_control(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
- const bool i_enable_slot_power)
+//------------------------------------------------------------------------------
+
+fapi2::ReturnCode p9_pcie_hotplug_control(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+ const bool i_enable_slot_power)
{
- FAPI_INF("Start");
- FAPI_INF("End");
+ FAPI_DBG("Start");
+ FAPI_DBG("End");
return fapi2::current_err;
}
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_pcie_hotplug_control.H b/src/import/chips/p9/procedures/hwp/nest/p9_pcie_hotplug_control.H
index e112f3185..0a25b32b1 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_pcie_hotplug_control.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_pcie_hotplug_control.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -26,10 +26,11 @@
/// @file p9_pcie_hotplug_control.H
/// @brief Manage slot power on hot-plug controlled slots (FAPI2)
///
-// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
+
+// *HWP HWP Owner: Joe McGill jmcgill@us.ibm.com
// *HWP FW Owner: Thi Tran thi@us.ibm.com
// *HWP Team: Nest
-// *HWP Level: 1
+// *HWP Level: 3
// *HWP Consumed by: HB
#ifndef _P9_PCIE_HOTPLUG_CONTROL_H_
@@ -44,27 +45,27 @@
// Structure definitions
//-----------------------------------------------------------------------------------
-//function pointer typedef definition for HWP call support
-typedef fapi2::ReturnCode (*p9_pcie_hotplug_control_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&,
- const bool);
+// function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode (*p9_pcie_hotplug_control_FP_t) (
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&,
+ const bool);
//-----------------------------------------------------------------------------------
-// Constant definitions
+// Function prototype
//-----------------------------------------------------------------------------------
extern "C" {
-//-----------------------------------------------------------------------------------
-// Function prototype
-//-----------------------------------------------------------------------------------
-
/// @brief Enable/disable PCIE slot power
-/// @param[in] i_target => P9 chip target
-/// @param[in] i_enable_slot_power => boolean to control power state (true=enable, false=disable)
-/// @return FAPI_RC_SUCCESS if the setup completes successfully,
+/// @param[in] i_target P9 chip target
+/// @param[in] i_enable_slot_power boolean to control power state (true=enable,
+/// false=disable)
+/// @return FAPI_RC_SUCCESS if the setup completes successfully, else error
//
- fapi2::ReturnCode p9_pcie_hotplug_control(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
- const bool i_enable_slot_power);
+ fapi2::ReturnCode p9_pcie_hotplug_control(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+ const bool i_enable_slot_power);
+
} //extern"C"
#endif //_P9_PCIE_HOTPLUG_CONTROL_H_
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