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| author | Ben Gass <bgass@us.ibm.com> | 2019-02-24 22:53:36 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-03-01 10:17:39 -0600 |
| commit | 5bfda17c80180754950e86c167d047c7df1bf665 (patch) | |
| tree | 7fb96135b34495d890e21077c276416108339fef /src/import/chips/p9/procedures/hwp/nest/p9a_mmio_util.C | |
| parent | c23e99369c5027c80330ce4269e9e9bef1896b93 (diff) | |
| download | talos-hostboot-5bfda17c80180754950e86c167d047c7df1bf665.tar.gz talos-hostboot-5bfda17c80180754950e86c167d047c7df1bf665.zip | |
Add chip base address to the OMI MMIO offset in p9a_mmio_util
Change-Id: Iac0b3e3cbdeff703306013456663f77e4cfe6996
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72418
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72437
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9a_mmio_util.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9a_mmio_util.C | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9a_mmio_util.C b/src/import/chips/p9/procedures/hwp/nest/p9a_mmio_util.C index a1eb3d0dd..62533c71a 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9a_mmio_util.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9a_mmio_util.C @@ -34,6 +34,7 @@ // *HWP Consumed by: HB #include <p9a_mmio_util.H> +#include <p9_fbc_utils.H> #include <p9_adu_setup.H> #include <p9_adu_access.H> #include <p9_adu_coherent_utils.H> @@ -42,16 +43,33 @@ fapi2::ReturnCode addOMIBase(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, uint64_t& io_mmioAddr) { - uint64_t l_base_addr; + std::vector<uint64_t> l_base_addr_nm0; + std::vector<uint64_t> l_base_addr_nm1; + std::vector<uint64_t> l_base_addr_m; + uint64_t l_addr_offset; + uint64_t l_base_addr_mmio; - fapi2::Target<fapi2::TARGET_TYPE_OMI> l_omi_target = i_target.getParent<fapi2::TARGET_TYPE_OMI>(); + fapi2::Target<fapi2::TARGET_TYPE_OMI> l_omi_target; + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_chip_target; + + l_omi_target = i_target.getParent<fapi2::TARGET_TYPE_OMI>(); + l_chip_target = l_omi_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>(); + + // determine base address of chip MMIO range + FAPI_TRY(p9_fbc_utils_get_chip_base_address(l_chip_target, + EFF_FBC_GRP_CHIP_IDS, + l_base_addr_nm0, + l_base_addr_nm1, + l_base_addr_m, + l_base_addr_mmio), + "Error from p9_fbc_utils_get_chip_base_address"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OMI_INBAND_BAR_BASE_ADDR_OFFSET, l_omi_target, - l_base_addr), + l_addr_offset), "Error from FAPI_ATTR_GET (ATTR_OMI_INBAND_BAR_BASE_ADDR_OFFSET)"); - io_mmioAddr |= l_base_addr; + io_mmioAddr |= (l_base_addr_mmio | l_addr_offset); fapi_try_exit: |
