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authorJoe McGill <jmcgill@us.ibm.com>2016-03-03 08:56:59 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2016-05-05 00:50:19 -0400
commit0a5583e26c96635f5460ee46da78880e7a432fdc (patch)
tree450dacb96ff46d81ce02adef67aba59db1df115c /src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C
parent05c9e64889edbedd858b5db4af45d67cafd60e44 (diff)
downloadtalos-hostboot-0a5583e26c96635f5460ee46da78880e7a432fdc.tar.gz
talos-hostboot-0a5583e26c96635f5460ee46da78880e7a432fdc.zip
L2 - Fabric updates for multi-chip support
Refactor p9_build_smp code Add FBC effective config (attribute-only) HWPs Add/call FBC initfiles HWP flow p9_fbc_eff_config p9_fbc_eff_config_links p9_chiplet_scominit p9_smp_link_layer p9_fab_iovalid p9_fbc_eff_config_aggregate p9_build_smp Update engd used in build to e9035 u087 Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643 Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: Jenkins Server Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22008 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C82
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diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C
new file mode 100644
index 000000000..04454481e
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+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C
@@ -0,0 +1,82 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* EKB Project */
+/* */
+/* COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* IBM_PROLOG_END_TAG */
+///
+/// @file p9_sys_chiplet_scominit.C
+///
+/// @brief SCOM inits to all chiplets required for drawer integration
+///
+
+//
+// *HWP HW Owner : Joe McGill <jmcgill@us.ibm.com>
+// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
+// *HWP Team : Nest
+// *HWP Level : 2
+// *HWP Consumed by : HB
+//
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include "p9_sys_chiplet_scominit.H"
+#include "p9_fbc_ioo_tl_scom.H"
+#include "p9_fbc_ioo_dl_scom.H"
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+fapi2::ReturnCode p9_sys_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+ fapi2::ReturnCode l_rc;
+ std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS>> l_obus_chiplets;
+ FAPI_DBG("Start");
+
+ do
+ {
+ // Invoke IOO (OBUS FBC IO) SCOM initfiles
+ FAPI_DBG("Invoking p9.fbc.ioo_tl.scom.initfile...");
+ FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target);
+
+ if (l_rc)
+ {
+ FAPI_ERR("Error from p9_fbc_ioo_tl_scom");
+ break;
+ }
+
+ l_obus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS>();
+
+ for (auto l_iter = l_obus_chiplets.begin();
+ l_iter != l_obus_chiplets.end();
+ l_iter++)
+ {
+ FAPI_DBG("Invoking p9.fbc.ioo_dl.scom.initfile...");
+ FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_dl_scom, *l_iter);
+
+ if (l_rc)
+ {
+ FAPI_ERR("Error from p9_fbc_ioo_dl_scom");
+ break;
+ }
+ }
+ }
+ while(0);
+
+ FAPI_DBG("End");
+ return l_rc;
+}
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