FBC ABUS TDM inject and recovery HWPs

p9_fbc_ioo_tdm_inject
  New HWP to permit concurrent maintenance of an SMP OBUS link
  (full-width to half-width operation)

  Specified half-link of provided endpoint target will have:
    - FIRs masked
    - DL layer quiesced
    - PHY powered down

  FW should set i_opts members as follows:
    - i_opts.run_all=true                    -- HWP executes all steps
    - i_opts.step=P9_FBC_IOO_TDM_INJECT_END  -- don't care

p9_fbc_ioo_tdm_recovery
  New HWP to permit concurrent maintenance of an SMP OBUS link
  (half-width to full-width operation)

  HWP detects half-link to recover from provided enpoint target. Specified
  half-link will have:
    - FIRs masked and reset
    - DL layer reset
    - PHY layer reset, dccal run, and re-initialized
    - DL FIRs cleared
    - DL started and retrained
    - FIRs unmasked

  FW should set i_opts members as follows:
   - i_opts.run_all=true                     -- HWP executes all steps
   - i_opts.even_not_odd=true                -- don't care
   - i_opts.step=P9_FBC_IOO_TDM_RECOVERY_END -- don't care

p9_security_white_black_list
  Add greylist entries for OBUS PHY, DL layer FIR and FIR mask registers

p9_io_regs
  Add register constants needed for link recovery

p9_io_obus_reset
  Clear RX and TX ioreset
  Add inits specified in SCOM initfile used at initial IPL

p9_obus_fir_utils
  Add constants to reflect grey list entries for OBUS FIRs

p9_io_obus_scominit
p9_chiplet_scominit
  Reference p9_obus_fir_utils for OBUS FIR programming values

Change-Id: Iad3884f6057c2ca21f436bc6efc0423fb5f70226
CQ: SW446137
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/59370
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Christopher W. Steffen <cwsteffen@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/60829
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 11 insertions, 12 deletions

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_obus_fir_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_obus_fir_utils.H
index 7da328386..c85cbb568 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_obus_fir_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_obus_fir_utils.H
@@ -51,18 +51,16 @@
 
 // FBC TL FIR constants
 // one register per chip (encompassing all links), in N3 chiplet
-const uint64_t FBC_IOO_TL_FIR_ACTION0 = 0x0000000000000000ULL;
-const uint64_t FBC_IOO_TL_FIR_ACTION1 = 0x0049200000000000ULL;
-const uint64_t FBC_IOO_TL_FIR_MASK    = 0xFF2490000FFFF00FULL;
-
-// in TDM mode, mask framer & parser attention
-const uint64_t FBC_IOO0_TL_FIR_MASK_TDM_EVEN = 0x0000080800000000ULL;
+const uint64_t FBC_IOO_TL_FIR_ACTION0  = 0x0000000000000000ULL;
+const uint64_t FBC_IOO_TL_FIR_ACTION1  = 0x0049200000000000ULL;
+const uint64_t FBC_IOO_TL_FIR_MASK     = 0xFF2490000FFFF00FULL;
 
 // FBC DL FIR constants
 // one register per link, in OBUS chiplet
-const uint64_t FBC_IOO_DL_FIR_ACTION0 = 0x0000000000000000ULL;
-const uint64_t FBC_IOO_DL_FIR_ACTION1 = 0x0303C000033FFFFCULL;
-const uint64_t FBC_IOO_DL_FIR_MASK    = 0xFCFC3FFFFCC00003ULL;
+const uint64_t FBC_IOO_DL_FIR_ACTION0  = 0x0000000000000000ULL;
+const uint64_t FBC_IOO_DL_FIR_ACTION1  = 0xFFFFFFFFFFFFFFFCULL;
+const uint64_t FBC_IOO_DL_FIR_MASK     = 0xFCFC3FFFFCC00003ULL;
+const uint64_t FBC_IOO_DL_FIR_GREYLIST = 0xFFFFFFFFFFFFDFFCULL;
 
 // in TDM mode, mask all link specific bits
 const uint64_t FBC_IOO_DL_FIR_MASK_TDM_EVEN = 0xAAAAAAAAAAAA8AA8ULL;
@@ -73,8 +71,9 @@ const uint64_t FBC_IOO_DL_FIR_MASK_SIM = 0xFCFC3FFFFCFF00FFULL;
 
 // OBUS PHY FIR constants
 // one register per link, in OBUS chiplet
-const uint64_t OBUS_PHY_FIR_ACTION0 = 0x0000000000000000ULL;
-const uint64_t OBUS_PHY_FIR_ACTION1 = 0x2000000000000000ULL;
-const uint64_t OBUS_PHY_FIR_MASK    = 0xDFFFFFFFFFFFC000ULL;
+const uint64_t OBUS_PHY_FIR_ACTION0  = 0x0000000000000000ULL;
+const uint64_t OBUS_PHY_FIR_ACTION1  = 0xFFFFFFFFFFFFC000ULL;
+const uint64_t OBUS_PHY_FIR_MASK     = 0xDFFFFFFFFFFFC000ULL;
+const uint64_t OBUS_PHY_FIR_GREYLIST = 0xFFFFFFFFFFFFC000ULL;
 
 #endif